James Hogan, EETimes
3/17/2011 4:50 AM EDT
There was an interesting panel discussion at this week’s Design Automation and Test in Europe (DATE) Conference that included representatives from various links in the SoC supply chain – EDA suppliers, IP providers, services companies and even a bona fide SoC developer. The panelists were asked to provide their view of where the EDA and IP industries were headed. Like the proverbial blind men who are asked to describe what is in front of them by touching different parts of an elephant, everyone brought a slightly different perspective to the table.
But not as different as you might think. Interestingly, five of the six panelists focused the majority of their talk on IP. For good reason: IP, and more generally design reuse, is the crux of SoC’s future and value proposition. Everyone agrees that the ability to quickly and efficiently re-use silicon-proven functionality in new designs holds the key to addressing the technical complexity, time pressures and jaw-dropping economics of bringing new SoCs to market. There simply is no other way.
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