CAST Simplifies PCI Express FPGA Integration with Application-Level Interface Core
March 25, 2011, Woodcliff Lake, NJ -- Semiconductor intellectual property (IP) provider CAST, Inc. has released an IP core that makes it easier to integrate PCI Express in an FPGA-based system.
The new PCIEXPAIF IP Core provides a high-level interface between popular system buses like AMBA® AXI4 and the PCI Express hard macro blocks available from FPGA vendors Altera and Xilinx. The core includes an extensible DMA and other functions to encode and decode Transaction Layer Packets, relieving the designer from directly managing this lower-level activity and enabling an application-level focus.
The interface core supports the 32- and 64-bit versions of the open source Wishbone Bus and the AMBA® AHB™, AXI™ and AXI4 buses. The Altera version is compatible with Altera Cyclone® IV GX, Arria® II GX, Stratix® IV GX, and Stratix V GX devices. The Xilinx version is compatible with Virtex®-5, Virtex-6 and Spartan®-6 devices. Support for additional buses, vendors, or device families is available on request.
Learn more about the PCIEXPAIF core and see sample implementation results at the CAST website: http://www.cast-inc.com/ip-cores/pci-express/pciexpaif/index.html
About CAST, Inc.
CAST, Inc. is a privately held company that enables quicker, less expensive electronic system on chip (SoC) realization through semiconductor IP products and supporting services. The company features advanced image/video processing and microcontroller IP families, plus the memory controllers, high-speed buses, peripherals, and other functions needed to build complete systems. Many of these are available pre-integrated in the form of Processor and Application Platforms. CAST overall strives to give customers a better IP experience through proven IP products; rapid, effective support; and reduced risk due to 17 years in the IP industry. Learn more at www.cast-inc.com.
|
CAST, Inc. Hot IP
Related News
- PLDA Announces Integration of its PCIe 2.0 controller with advanced AMBA AXI interface in Microsemi's new SmartFusion2 SoC FPGA
- PLD Applications' PCI-SIG-tested x1, x4, x8 PCI Express IP Core validated for FPGA and ASIC integration
- Rambus Delivers PCIe 6.0 Interface Subsystem for High-Performance Data Center and AI SoCs
- Achronix Selects Synopsys' Leading DesignWare IP Solutions to Accelerate Development of High-Performance Data Acceleration FPGA
- Rambus Announces Comprehensive PCI Express 5.0 Interface Solution
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |