Semiconductor IP core implements complete ISO/IEC 15444-1 standard JPEG2000 Encoder
San Jose, California & Belfast, N. Ireland (Feb 28, 2002) – Amphion Semiconductor Ltd., the leading provider of semiconductor intellectual-property for broadband, wireless and multimedia communications, today announces availability of the first entirely hardware-accelerated Wavelet Transform based JPEG2000 Encoder core for advanced still- and motion-image compression applications, such as ‘dual-mode' still/movie-clip multi-megapixel digital cameras, 4G/3G, medical imaging, office equipment and surveillance. The Amphion CS6510 JPEG2000 hardware-accelerator core easily interfaces with any embedded host processor to construct a complete JPEG2000 encoding system on a single chip.
The Amphion CS6510 core is fully compliant with the ISO/IEC 15444-1 standard JPEG2000 image coding system and carries out computationally-intensive tasks such as wavelet transform, entropy coding, quantization, and data scheduling, leaving the system processor to handle simple tasks such as managing the user interface and output data formatting. When implemented in 180nm CMOS process technology the CS6510 delivers data encoding rates up to 60 MegaSamples/second on 8-bit samples with real-time ‘lossy' image compression ratios up to 50:1. The core also handles arbitrary image sizes up to 231 x 231 pixels, standard ‘lossless' compression, flexible image input formats, and a wide variety of grayscale and color imaging formats such as RGB, YUV, YCrCb, and CMYK.
JPEG2000 in the 4G infrastructure
Large telecommunications providers developing fourth generation (4G) wireless systems, particularly in Asia and Europe, are counting on scalable media coding techniques such as JPEG2000 to help optimize network resources and deliver high-performance streaming multimedia content to mobile users. These providers are planning to integrate CMOS image sensors into tens of millions of next-generation mobile handsets to facilitate new services. Even though bandwidth in 4G wireless infrastructure is anticipated to be higher than 100 Mbits/second, the imaging content from millions of users must be managed in order to achieve acceptable quality of service. The high quality compression and error resilience achieved by JPEG2000 will reduce bandwidth loading and help recover from dropped packets in transmission.
Flexible architecture for SoC applications
Amphion can configure the performance and power consumption of the reference CS6510 JPEG2000 core to cover a variety of applications. For example, in battery-powered mobile handsets where low power is generally more crucial than high-resolution images, the core can trade off some performance to significantly decrease power consumption down to 13 milliwatts. However, for applications like medical imaging where real-time high-resolution images are vital, the performance can be boosted to 480 Mbits/second.
"The CS6510 off-loads computationally intensive JPEG2000 algorithms from the embedded system processor," explained John McCanny, Chief Technology Officer at Amphion. "In dual- mode digital cameras, for instance, that enables the processor to take on other value-add functionality in the system such as audio processing. Hardware-accelerated compression is also necessary to take full advantage of the new breed of high color resolution 16-megapixel CMOS image sensors entering the market." The reference Amphion JPEG2000 Encoder core balances between high quality compression and low power consumption with sustained data rates above 100 Mbits/second enabling the compression of full-motion, full-color video images at frame sizes in excess of standard-definition TV (720 x 480). This makes the CS6510 an attractive candidate for dual-mode still/video digital cameras and for surveillance systems.
"Amphion's JPEG2000 encoder core has successfully overcome the memory management issue in wavelet transform blocks. That's one of the main challenges in JPEG2000 implementation," remarked Stephen Farson, Vice-President of Engineering at Amphion. "Most of the power consumption occurs in memory management of wavelet transform data. Amphion's line-based implementation performs complex wavelet transform algorithms using 5/3 and 9/7 filters for real- time lossy and lossless compression of JPEG2000 Profile-0 with minimal memory usage. The result is an overall decrease in power consumption and longer battery life for hand-held devices."
The Amphion CS6510 JPEG2000 Encoder core will be available for license from second quarter 2002 followed shortly by JPEG2000 decoder and codec solutions. The Amphion CS6210 Discrete Wavelet Transform (DWT) core is available separately for SoC/ASIC designers developing hybrid software-hardware JPEG2000 sub-systems. Amphion has already licensed its existing portfolio of silicon-proven JPEG cores for SoC/ASIC and FPGA/PLD to multiple semiconductor and systems design customers.
About the JPEG2000 Standard
JPEG2000 is the new Wavelet-based digital imaging compression standard and is the successor to the widely used JPEG standard; it's an extremely flexible and elegant coding system that enables the end-user to store more images in less memory. JPEG can only best support compression ratios up to 25:1. JPEG2000 also enables the user to control image quality without reprocessing: for example, digital images can be downloaded with low quality first, and then the quality and resolution of a selected image can improve progressively without reprocessing. In summary, the JPEG2000 standard offers enhanced compression and features superior to the original JPEG standard such as:
* improved compression performance
* improved image quality, especially at compression ratios above 25:1
* higher resolution without noise and blocking artifacts, even at high compression
* resolution and quality scalability to deliver compressed images at a variety of resolution and quality levels from lossy to lossless in the same file
* supports real-time lossy and lossless compression – vital in applications such as medical imaging. JPEG cannot support both at the same time
* superior rate control to supply higher image quality for a pre-specified file size
* error resilience – essential for transmission of images in noisy environments
For more information about the JPEG2000 and JPEG standards, visit http://www.jpeg.org
Amphion is the leading supplier of application-specific cores for System-on-a-Chip (SoC) integrated circuit designs for multimedia, data security, wireless and broadband communications. Amphion delivers high-performance solutions for video and image compression, advanced encryption, and speech and channel coding with a comprehensive range of silicon-optimized products. Using proprietary techniques to directly map digital signal processing functions and algorithms into hardware, Amphion develops and licenses semiconductor intellectual-property (SIP) cores that are close to optimal in terms of power, cycles, and area – computationally up to several orders of magnitude more efficient than equivalent functions implemented on a programmable processor. Amphion cores operate standalone, or by direct interface to industry- standard RISC and DSP processors, and can be easily migrated through successive generations of fabrication technology, thus preserving engineering investments in SoC design. Amphion is a privately held company with corporate headquarters and engineering in Belfast, Northern Ireland, UK and worldwide sales and marketing headquarters in San Jose, California, USA. Amphion was formerly known as Integrated Silicon Systems Ltd, or ISS. For more information, visit http://www.amphion.com
Notes to Editors
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David Mann, Amphion
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Ron Sailors, Amphion
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