Toshiba launches 19nm process NAND flash memory
The world's finest process yields single chips with a 64 gigabit capacity
TOKYO -- april 22, 2011 -- Toshiba Corporation (TOKYO: 6502), reinforcing its leadership in the development and fabrication of cutting-edge, high density NAND flash memories, today announced that it has fabricated NAND flash memories with 19nm process technology, the finest level yet achieved. This latest technology advance has already been applied to 2-bit-per-cell 64-gigabit (Gb) chips that are the world's smallest and offer the highest density on a single chip (8 gigabytes (GB)). Toshiba will also add 3-bit-per-cell products fabricated with the 19nm process technology to its product line-up.
Samples of 2-bit-per-cell 64-gigabit will be available from the end of this month with mass production scheduled for the third quarter of the year (July to September 2011).
Toshiba leads the industry in fabricating high density, small die size NAND flash memory chips. Application of the 19nm generation process technology will further shrink chip size, allowing Toshiba to assemble sixteen 64Gbit NAND flash memory chips in one package and to deliver 128GB devices for application in smartphones and tablet PCs. The 19nm process products are also equipped with Toggle DDR2.0, which enhances data transfer speed.
As the market for mobile equipment, such as smartphones, tablet PCs, and SSDs (solid state drives) expands, demand for smaller, higher density memory products grows. By accelerating process migration in NAND flash memory, Toshiba aims to reinforce and extend its leadership in the NAND flash memory market.
|
Related News
- Toshiba launches 24nm process NAND flash memory
- Toshiba Launches Industry's Largest Embedded NAND Flash Memory Modules
- Toshiba to Launch World's First 32nm Process NAND Flash Memory
- Toshiba Launches ARM Cortex-M3-based Microcontrollers with Latest 65nm Flash Embedded Logic Process for Motor Control and Consumer Devices
- Process Roadmap For Memory Devices Marches On as 3D Looms
Breaking News
- Siemens selected by Microsoft for Rapid Assured Microelectronics Prototypes (RAMP) Program
- CEVA, Inc. Announces Second Quarter 2022 Financial Results
- Arteris Announces Financial Results for the Second Quarter 2022 and Estimated Third Quarter and Full Year 2022 Guidance
- Cadence Library Characterization Solution Accelerates Delivery and Enhances Quality of Arm Memory Products
- Logic Fruit appoints Vijay Pal Sharma as VP - Engineering
Most Popular
- Brite Semiconductor provides xSPI/Hyperbus™/Xcella™ controller and PHY total solution
- Arm achieves record revenue and shipments in Q1 FY 2022
- CEVA, Inc. Announces Second Quarter 2022 Financial Results
- Arteris Announces Financial Results for the Second Quarter 2022 and Estimated Third Quarter and Full Year 2022 Guidance
- Intel Orders Delayed, TSMC Slows Three-Nanometer Expansion, Says TrendForce
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |