MIPI I3C Controllers - Dual Role Master (70016); APB I3C Slave (70002), Generic I3C Slave
The SpRAM PLUTON is a breeze from Dolphin Integration cooling up to 100 times leakage beyond stand-by modes at 180 nm
Grenoble, France – May 02, 2011. The celebrated PLUTON eLC architecture for single port RAM used in millions of chips for low power and high density, at nominal and low voltage, is now offered with innovations dividing leakage up to 100 times at 180 nm!
5 options to grant the optimal trade-offs between power and density while facilitating integration:
In mature process nodes, decreasing the leakage current of large arrays of memory is a crucial solution for designing power sensitive SoCs.
To address the leakage challenge, Dolphin Integration has enriched the PLUTON architecture of Single Port RAM so as to offer a generator endowed with 5 differentiated options enabling SoC leakage control through local retention and/or extinction of the SpRAM instance. Depending on the option selected, leakage is divided by a factor of up to 100.
Additional benefits
- Straightforward design-in
- Mux factor can be chosen
- Single power supply: VDD
- Single command signal controlled by the SoC Integrator
- Directly implementable in any standard EDA flow
- Ultra low Dynamic Power
- Up to 60% less consuming than foundry sponsored solutions by design
- A Low Voltage and a Dual Voltage variants are also available
Have a quick look at the Presentation Sheet:
- SpRAM PLUTON eLC-HD (Density)
- SpRAM PLUTON eLC-RS (Retention Islet)
- SpRAM PLUTON eLC-ES (Extinction Islet)
To gain access to evaluation material, contact directly the product manager at ragtime@dolphin.fr
About Dolphin Integration
Dolphin Integration is up to their charter as the most adaptive and lasting creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation as well as independence and partnerships with Foundries. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components. The strategy is to follow product launches with evolutions addressing future needs, emphasizing resilience to noise and drastic reductions of power-consumption at SoC level, thanks to their own EDA solutions enabling Integration Hardware Modeling (IHM) and Application Hardware Modeling (AHM) as well as early Power and Noise assessment, plus engineering assistance for Risk Control.
For more information about Dolphin, visit: www.dolphin.fr/ragtime
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