Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
Aizyc Technology unveils hardware DRM solution with HDCP 2.0 IP Core for multimedia SoCs
June 29, 2011 – Aizyc Technology announces immediate availability of its HDCP 2.0 IP Core which is a hardware and software based Digital Rights Management (DRM) solution for next generation multimedia SoCs. The HDCP IP Core offers out of the box solution for SoC designers to integrate it with minimal tweaking. The IP comes with supporting firmware in µC/OS-II, ThreadX and Linux. The HDCP2.0 IP core consists of highly configurable Transmit and Receive modules.
Aizyc HDCP 2.0 IP is compact, low power and performs authentication and session management along with encryption and decryption .The HDCP2.0 IP Core supports 32-bit APB slave interface for register configuration. The IP is also available with other interfaces like AHB, OCP, etc., on request. A sample software is provided with the IP to ease the engineering effort required in integrating into the SoC. AES-128 in CTR mode, SHA-256 in HMAC mode, Random Number Generator compliant to NIST-SP 800 90 are built into the IP.
Aizyc HDCP 2.0 IP is designed to protect the transmission of audio-visual content between a HDCP transmitter and a HDCP receiver. The HDCP transmitter may support simultaneous connections to HDCP receivers through one or more of its HDCP – protected interface ports. HDCP transmitter and receiver pair performs authentication before it does AV data transfer. Authentication involves a series of control messages to be exchanged among transmitter and receiver.
The HDCP IP is a complete, robust and cost-effective content protection solution for digital audio/video entertainment content in the wireless and wired home network environment. The solution is targeted at OEMs , embedded system , device manufacturers, and can be seamlessly integrated into embedded components for use in tablets, media centers, DVD players, HDTVs, set top boxes, game consoles, streaming controllers, laptops and other consumer electronic products.
Aizyc provides comprehensive HDCP solution to its customers for the complete sub-system development, along with verilog RTL code, constraint randomized test suite and firmware on linux, µC/OS-II and ThreadX.
About Aizyc Technology
Aizyc Technology is rapidly growing end-to-end Product Engineering & IP Core Company with strong ASIC, Systems & Embedded firmware background. Aizyc’s engineering team has delivered multiple first pass SoC, products and solutions. Aizyc’s product portfolio includes SD 3.0 Host/Device, USB2.0 Host/Device, MAC, TCP/IP Offload Engine and other Peripheral IPs. Aizyc’s core expertise lies in ARM based SoCs, Consumer Electronics, Industrial Solutions, Enterprise Networking, Personal Computer Products, Digital Imaging , Medical, Home automation and allied fields. The engineering team has helped the clients to reduce time and efforts involved, by one-third. Aizyc Technology is headquartered at Hyderabad, India with design centers in Silicon Valley, CA and Hyderabad.. For more information, visit www.aizyc.com or drop an email at sales@aizyc.com
|
Related News
- Elliptic Technologies Unveils Industry Leading HDCP 2.0 Content Protection Solution
- IntellaSys Unveils Industry's First 128-Bit, Hardware-Encrypted Controller Chip for USB 2.0 NAND Flash Memory Used in Thumb Drives
- T2M IP Unveils Cutting-Edge HDMI 2.0 Tx PHY & Controller IP Cores are available for immediate licensing for your advanced diverse applications
- Faraday Unveils the Industry's Smallest USB 2.0 OTG PHY IP
- Synopsys Accelerates Verification Closure of Multimedia SoCs with Next-Generation Verification IP for HDMI 2.0a and HDCP 2.2
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |