IRVINE, Calif.--(BUSINESS WIRE)--March 11, 2002--3DSP Corporation, the leader in configurable digital signal processor (DSP) architectures, announced that it has partnered with CoWare(TM), Inc., the leading provider of system-level design tools, to strengthen joint customers' design processes and high-level verification for multi-core DSP system-on-a-chip (SoC) solutions. This partnership entails integration of appropriate 3DSP design tools within CoWare's N2C(TM) design system, a demonstration of which is being provided in the 3DSP booth number 4652N at the Embedded Systems Conference in San Francisco, March 13-15, 2002.
3DSP's tools enable designers to quickly optimize DSP system architecture for their target application, while CoWare's N2C design system helps engineering teams take their initial design ideas from napkin-to-chip in half the time of previous design methods.
"Our partnership with CoWare moves multi-core DSP-based SoC implementation forward by providing 3DSP customers with the ability to better manage complex product design process flow from initial specification to production," said Eric Mack, marketing director at 3DSP. "Ultimately this will ensure our customers first-time-right silicon that is executed in a minimum time."
"Our aim is to provide customers with the most capable hardware/software co-design environment available for producing complex multi-core DSP and RISC-based SoCs," said Ed Begun, director of marketing and business development at CoWare. "Integrating 3DSP's tools for configurable DSP cores into our N2C design system will provide a unique combination of system design capabilities to develop multi-core products for a range of wireless, networking and streaming multimedia applications."
The demonstration at the Embedded Systems Conference booth 4652N clearly shows how 3DSP and CoWare capabilities meld to provide a more robust and flexible design environment for the embedded system designer. It involves the simulation of a complex multi-core SoC solution based on an SP-5flex(TM) configurable DSP core and an ARM7TDMI AHB RISC microprocessor core, and the facilitation of a bus interconnect between 3DSP's Shuttle intelligent bus and the AMBA AHP/APB bus employed by the ARM core. The entire platform is simulated at the cycle accurate C level to achieve outstanding simulation performance while maintaining accuracy. This demo will also provide SoC designers with a platform to analyze software performance of the SP-5flex core within an AC3 decoding application, as a means to evaluate the performance of this core when internal register and MAC configurations are varied.
3DSP offers the industry's only fully configurable digital signal processing architecture with a comprehensive object-oriented design environment and application-based intellectual property. 3DSP's technology empowers system designers to create custom SoC solutions in silicon that achieve significant competitive advantages in terms of performance, integration, power consumption, cost and time-to-market for tomorrow's multimedia, wireless and Voice over Packet applications. For more information on the company and its products, visit www.3dsp.com or contact 3DSP headquarters at 16271 Laguna Canyon Rd., Irvine, CA 92618, phone: 949/435-0600 fax: 949/435-0700.
CoWare, Inc., provides tools and methodologies that help engineering teams cut their system-on-a-chip design times in half. CoWare N2C provides an efficient means to capture, analyze, and implement a system specification, with parallel development by hardware and software teams. In addition, CoWare N2C greatly enhances IP re-use and selection, further reducing design time. The CoWare N2C software is employed by major systems and semiconductor companies including Alcatel, Fujitsu, Matsushita, Mitsubishi, Motorola, Nokia, Sony and STMicroelectronics. CoWare is headquartered in Santa Clara, Calif. USA. For more information, visit www.CoWare.com.
3DSP Corporation, 3DSP, SP-5flex and DSP-Shuttle are trademarks of 3DSP Corporation. N2C is a trademark of CoWare Corporation.
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