Tensilica DSP core does 100 GMACs at 1W
Update: Cadence Completes Acquisition of Tensilica (Apr 24, 2013)
Rick Merritt, EETimes
8/19/2011 9:15 AM EDT
PALO ALTO, Calif. – Tensilica described a new integer DSP core for next-generation cellular applications that when made in a 28nm process can compute 100 GMACs/second at less than a Watt. The BBE64 core is a new instruction set architecture based on the companies' current Xtensa LX4 core.
"We are trying to build a world-leading DSP core, arguably the fastest DSP core yet," said Chris Rowen, Tensilica founder and chief technologist in a talk at the Hot Chips event here.
The BBE64 combines SIMD and VLIW concepts and lets designers configure processors for a range of handset and base stations uses. Rowen said the core run at data rates of "a few hundred MHz" could process 2x2 MIMO LTE Advanced signals at 1 Gbit/second across 100 MHz of spectrum.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Related News
- Tensilica Reaches Audio DSP Milestones: 300 Million HiFi Audio/Voice DSPs, Over 100 Software Packages, More Than 30 Partners
- Fluent.ai Offers Embedded Voice Recognition for Cadence Tensilica HiFi 5 DSP-Based True Wireless Stereo Products
- Cadence Tensilica HiFi DSP Enables Highly Energy-Efficient Audio Playback for Dolby Atmos for Cars
- Cadence Advances Radar, Lidar and Communications Processing for Automotive, Consumer and Industrial Markets
- Light Leverages Cadence Tensilica Vision Q7 DSP for Enhanced Depth Perception in Next-Generation ADAS Systems
Breaking News
- EU Parliament Adopts Position on Chips Act
- Linaro to Acquire Arm Forge Software Tools Business
- Intel kills its RISC-V Pathfinder development kit programme
- BrainChip Tapes Out AKD1500 Chip in GlobalFoundries 22nm FD SOI Process
- Gidel introduces groundbreaking edge computer with NVIDIA Jetson Orin NX system-on-module and high-bandwidth camera frame grabber for real-time image acquisition compute and AI processing