Sidense's NVM IP Completes TSMC IP9000 Assessment at 90nm Low-Power Process Node
Update: Synopsys Expands DesignWare IP Portfolio with Acquisition of Sidense Corporation (Oct. 17, 2017)
Sidense adds SiPROM one-time programmable (OTP) memory macros at 90LP to growing list of products that meet TSMC’s IP9000 Assessment requirements.
Ottawa, Canada – (September 12, 2011) - Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) one-time programmable (OTP) memory IP cores, announced today that the Company’s SiPROM 1T-Fuse™ OTP macro family for the 90LP process has met TSMC’s IP9000 Assessment program requirements. This achievement adds to the list of 1T-OTP products at several process nodes that have already met IP9000 Assessment.
SiPROM in a 90nm low-power process provides an IP9000 Assessed OTP solution for customers developing ICs at 90nm for such applications as mobile handsets that require low power consumption or migrating designs from 130nm to this higher-density, higher-performance process.
Sidense offers a complete line of off-the-shelf 90nm macros covering bit counts from 8 Kbits to 512 Kbits. Customers are using Sidense’s 1T-OTP macros at 90nm to replace ROM, store secure keys and handle configuration-specific information for a wide range of applications including SoCs for mobile, wireless and HDTV.
“Sidense’s 1T-OTP macros have now met the demanding IP9000 Assessment requirements at several of the most popular TSMC process nodes,” said Rhéal Gervais, Vice President of Operations at Sidense. “With others due to complete IP9000 Assessment within the next few months, we continue to prove that our 1T-OTP products meet the reliability and quality attributes our customers require over the range of process nodes and variants they need now and plan to use in the future.”
About SiPROM
SiPROM macros are field-programmable, antifuse-based one-time programmable (OTP) memory macros that are based upon Sidense’s innovative 1T-Fuse architecture, resulting in the most area-efficient one-transistor bit cell. SiPROM is architected to allow the customer to balance their system needs while making real-time tradeoffs in read speed, power and security to meet a diverse range of application requirements spanning the mobile, PC, consumer, industrial and automotive markets.
About Sidense Corp.
Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The Company’s innovative one-transistor 1T-Fuse™ architecture provides the industry’s smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (LNVM) IP solution. With over 70 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.
Sidense SiPROM, SLP and ULP memory products, embedded in over 160 customer designs, are available from 180nm down to 40nm and are scalable to 28nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, please visit www.sidense.com.
|
Related News
- Sidense Qualifies 1T-OTP Memory IP at GLOBALFOUNDRIES 55nm Low-Power Process Node
- Sidense Completes TSMC IP9000 Assessment for SiPROM NVM IP and Attains more than 70 Customer Licenses in the Last 12 Months
- Sidense Completes TSMC IP9000 Assessment for Non-Volatile Memory (NVM) Product Families
- M31 Announces Low-Power IP Solutions for TSMC's N12e Process
- Uniquify's LPDDR4 Super Combo Interface IP in Volume Production at 28nm Low-power Node
Breaking News
- Arm Total Design Ignites Growing Ecosystem of Arm-based Silicon for a Sustainable AI Datacenter
- Codasip unveils versatile automotive-grade embedded RISC-V core
- Arteris Network-on-Chip Tiling Innovation Accelerates Semiconductor Designs for AI Applications
- CEA-Leti Launches OpenTRNG, an Open-Source Project For True Random Number Generators Using Ring-Oscillator-Based Architectures
- Agile Analog announces MoU to support new Southern Taiwan IC Design Industry
Most Popular
- September foundry sales: a tale of differing fortunes
- Intel, TSMC to detail 2nm processes at IEDM
- Arm, ASE, BMW Group, Bosch, Cadence, Siemens, SiliconAuto, Synopsys, Tenstorrent and Valeo commit to join imec's Automotive Chiplet Program
- SEMIFIVE Extends Partnership with Arm to Advance AI and HPC SoC Platforms
- DisplayPort Rx PHY and Controller IP Cores in multiple Leading Technology Nodes for Next-Generation Video SoCs
E-mail This Article | Printer-Friendly Page |