Cadence Library Characterization Scripts Now Available in New TSMC Reference Kit
New Library Characterization Reference Kit From TSMC Enables Faster Library Re-Characterization
SAN JOSE, CA, Oct 17, 2011 -- Cadence Design Systems, Inc., a leader in global electronic design innovation, today announced that it has collaborated with TSMC to provide mutual customers access to a library characterization reference kit. The Cadence(R) Library Characterizer (Altos Liberate) reference kit for TSMC's standard cell libraries is now available to TSMC customers for download on TSMC-Online. The reference kit, along with the Cadence Library Characterizer technology, enable customers to re-characterize their standard cell libraries in-house, on their own schedule with the same characterization technology and setup used internally at TSMC, delivering better consistency.
"Through our work with TSMC on the mission-critical challenge of foundation IP characterization, customers can now leverage the same technology used in-house at TSMC with the same setup and constraints, helping them address the specific design challenges created through changes to their standard cell libraries," said Wilbur Luo, group director, product marketing, Silicon Realization Group at Cadence. "We are always looking for ways to give customers greater control over the design processes, and TSMC's introduction of its Library Characterization Reference Kit does just that."
Shrinking process geometries increase process variations and make creation of accurate noise, power and timing models for foundation IP very complex given smaller time-to-market windows. The combination of TSMC's Library Characterization Reference Kit and the Cadence Library Characterizer allows customers to speed their overall design schedule.
"Enabling our customers to re-characterize their standard cell library IP not only gives them more control over their schedule, it also gives them more control to address the timing, noise and power of their design," said Suk Lee, director of Design Infrastructure Marketing at TSMC. "By providing the Library Characterization Reference Kit online, we are giving our customers the tools needed to assure re-characterization that addresses their specific design challenges."
The Cadence Library Characterizer technology enables re-characterization across process changes and additions to the IP library. It enables ultra-fast and accurate characterization of memory, standard cell libraries and other foundation IP, generating required models for SoC implementation. TSMC has made Cadence Library Characterizer scripts for standard cell libraries available for 40- and 28-nanometer process nodes.
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com .
|
Cadence Design Systems, Inc. Hot IP
Cadence Design Systems, Inc. Hot Verification IP
Related News
- Cadence and Intel Collaborate to Release 14nm Library Characterization Reference Flow for Customers of Intel Custom Foundry
- TSMC Adopts Cadence Solutions for 16nm FinFET Library Characterization
- Cadence AI-Powered Virtuoso Studio Supports RF and mmWave Design Reference Flows for TSMC N16RF, N6RF and N4PRF
- Cadence and TSMC Collaborate on N16 79GHz mmWave Design Reference Flow to Accelerate Radar, 5G and Wireless Innovation
- Cadence Accelerates RF Design with Delivery of New TSMC N16 mmWave Reference Flow
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |