Ultra-low power 32 kHz RC oscillator designed in GlobalFoundries 22FDX
DCD introduces IP Core for the Controller Area Network
Digital Core Design, as a leading IP Core provider and System-on-Chip (SoC) design house, has been invited for conference “Know-how transfer in automotive”. The conference was held during international Fair of Automation and Robotization in Industry at Expo Silesia, Poland.
Bytom, Poland -- November 21, 2011. Digital Core Design as a proprietary automotive IP Core provider participated in fair show and the international conference devoted to know-how transfer. Poland and Silesia Region particularly is one of the leading country regarding to automotive business in Europe. Thanks to the main European FIAT fab and OPEL (General Motors) factory which manufacture their newest car models, growth rate is positive, even though economy crisis. Strict cooperation with concerns propels also proprietary solutions providers. – We noticed that safety & power safe technology are becoming one of the most significant, not only in automotive – says Tomasz Krzyzak, vice-president at Digital Core Design – that’s why not only our CPU solutions but also “automotive” interfaces CAN or LIN are equipped with enhanced control and power safe solutions.
Like for example CAN is a keyword connecting the world of electronics with the world of automotive. Because of its fundamental role in all aspects of security and safety, trustworthy implementations are crucial. That's why Digital Core Design developed unique IP Core, which delimits the highest quality standards. The DCAN is a standalone controller for the Controller Area Network (CAN), which is common used in automotive and industrial applications. What's the most important, DCAN conforms to Bosch CAN 2.0B specification (2.0B Active). The Core has simple CPU interface (8/16/32 bit configurable data width), with little or big endian addressing scheme. The DCAN supports both standard (11 bit identifier) and extended (29 bit identifier) frames. Hardware message filtering and 64 byte receive FIFO enables back-to-back message reception with minimum CPU load. The DCAN is described at RTL level allowing target use in FPGA or ASIC technologies.
More information at http://dcd.pl/ipcore/131/dcan/
Information about Digital Core Design:
Digital Core Design is a leading Intellectual Property (IP) Core provider and System-on-Chip (SoC) design house. The company was founded in 1999 and since the early beginning is considered as an expert in IP Cores architecture improvements. Thousands of customers became convinced by our unique solutions and billions of people worldwide use our technology in USB, MP3 players, mobile phones and many other.
The innovativeness of DCD's IP solutions has been confirmed by over 300 licenses sold to over 200 customers worldwide, such as: INTEL, SIEMENS, PHILIPS, TOYOTA, OSRAM, GENERAL ELECTRIC, SILICON GRAPHICS, RAFAEL, SAGEM or GOODRICH.
More information: http://dcd.pl/page/147/about/
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