Ultra-fast chip-level layout editor speeds final physical design steps during critical handoff to manufacturing
HSINCHU, Taiwan, November 29, 2011 — SpringSoft, Inc., a global supplier of specialized IC design software, today announced immediate availability of the Laker™ Blitz chip-level layout editor, a new software product targeting chip finishing applications and the latest addition to its popular family of Laker custom IC design and layout automation solutions. The Laker Blitz product enables high-speed viewing and editing of chip-level layouts to streamline tapeout-to-manufacturing operations. It is ideally suited for designs with massive data sets, such as advanced-node system-on-chip (SoC) implementations and large memory chips that are widely used in consumer electronics.
Chip finishing is one of the last physical design steps before manufacturing and generally requires engineers to merge large design files, run design rule checks (DRC), and make final corrections, all while under enormous schedule pressures. Currently, they most likely use layout tools or viewers that have been optimized for other tasks and have limited performance or minimal editing capabilities.
By contrast, SpringSoft’s Blitz software is specifically optimized for speed and user productivity during the chip finishing part of the design cycle, in keeping with the company’s focus on providing specialized solutions that address key pain points in the chip development process. It loads and exports GDSII data files 5 to 20 times faster than conventional layout tools, offers more robust layout editing capabilities than most high-capacity layout viewers, and provides an extensive library of Tool Command Language (Tcl) extensions for automating data manipulation. Semiconductor manufacturers, foundries and fabless design companies are using SpringSoft’s new Laker offering for a variety of chip finishing applications, including IP merging, SoC assembly, and chip-level DRC reviews.
“There is a tools gap today when it comes to finishing a chip. Conventional layout editors are too slow, mask viewers are cumbersome with little or no editing capabilities, and DRC tools are limited in scope,” said Dave Reed, senior director of marketing for custom IC design solutions at SpringSoft. “Laker Blitz brings together performance, capacity, and proven layout technologies to significantly reduce the time and effort required to achieve final tapeout of high quality, high-density chip designs.”
Laker Blitz utilizes new, innovative database technology for the rapid import, editing and export of massive GDSII data files, which are typically tens of gigabytes or more in size for current generation chips. This enables designers to easily load, view and manipulate chip-level layouts with access to the complete layout hierarchy. They can perform cell, window or full-chip DRCs, and then find and fix violations without leaving the Laker Blitz environment. Layout editing and debug at the chip-level is further simplified with advanced features, such as net highlighting commands to trace critical nets.
Because Laker Blitz is built on the same technology platform deployed by SpringSoft’s Laker Custom Layout Automation System, Laker customers benefit from its familiar user interface, compatibility with existing Laker Tcl extensions, and integration of ‘sign-off’ DRC tools. Laker layout offers the power of controllable automation and unmatched interoperability to achieve superior layout results with less effort for analog, mixed-signal, and custom digital designs. More than 300 companies, including many of the world’s leading semiconductor companies, have adopted the Laker layout system for designs down to 20 nanometers.
The Laker Blitz software is shipping today for production use. For more information about Laker Blitz and the entire suite of Laker products, visit: http://www.springsoft.com/products/laker-custom-ic-design-solutions.