Arteris Collaborates on Interposer Test Chip Projects With TSMC
Goal Is More Efficient and Timely Commercialization of Through-Silicon Via (TSV) Technology Using Arteris Network-on-Chip (NoC) Interconnect IP & Tool Products
SUNNYVALE, CA-- December 06, 2011 -- Arteris Inc., the inventor and leading supplier of network-on-chip (NoC) interconnect IP solutions, today announced that it is collaborating with TSMC by incorporating Arteris' FlexNoC Network-on-Chip (NoC) interconnect IP into an SoC die on silicon interposer test chip.
"TSMC chose to work with Arteris on the interposer based test chip program because its interconnect technology is ideally suited to addressing the SoC wire routing congestion and timing closure challenges," said Suk Lee, Director of Design Infrastructure Marketing at TSMC. "TSMC and Arteris are working together to make it easier for our joint customers to adopt these technologies."
In addition to working together on the interposer based test chip program, Arteris is a TSMC Open Innovation Platform Partner and a participant in TSMC's Reference Flows 11.0 and 12.0.
Unlike other interconnect solutions, Arteris's FlexNoC network on chip interconnect IP is physically implemented as a distributed network of small design elements within a SoC floorplan. Furthermore, FlexNoC's flexibility simultaneously addresses bandwidth, latency and quality of service (QoS) requirements introduced with wide data paths.
"TSMC and Arteris are working together to accelerate adoption of interconnect fabric technology by increasing design efficiency and proactively addressing the routing congestion and timing closure issues," said Charlie Janac, Arteris President and CEO.
About Arteris
Arteris, Inc. provides Network-on-Chip interconnect IP and tools to accelerate System-on-Chip semiconductor (SoC) assembly for a wide range of applications. Results obtained by using the Arteris product line include lower power, higher performance, more efficient design reuse and faster development of ICs, SoCs and FPGAs.
Founded by networking experts, Arteris operates globally with headquarters in Sunnyvale, California and an engineering center in Paris, France. Arteris is a private company backed by a group of international investors including ARM Holdings, Crescendo Ventures, DoCoMo Capital, Qualcomm Incorporated, Synopsys, TVM Capital, and Ventech. More information can be found at www.arteris.com.
|
Arteris Hot IP
Related News
- M31 Collaborates with TSMC to Advance 2nm eUSB2 IP Innovation
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Alchip Collaborates With Arteris To Expand ASIC Design Services
- Spectral Design & Test Inc joins TSMC OIP IP Alliance
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |