First to enable at-speed validation of serial interface protocols requiring analog PHY’s
San Jose, California – December 9, 2011 - Arasan Chip Systems, Inc.(“Arasan”), a leading provider of Total IP Solutions, today introduced the third generation of its Hardware Validation Platform family targeted for validation of hardware and software infrastructure that comply with analog PHY based standards for serial connectivity between chips, camera and display modules, and flash storage in mobile platforms. Customers adopting emerging and existing protocols like MIPI’s Unipro, CSI-2 and DSI, JEDEC’s UFS and SDA’s SD4.0 can now leverage Arasan’s platforms to jump start and speed up their pre-silicon, silicon and system validation and applications development
Arasan’s Hardware Validation Platforms enable early validation of a new interface by emulating the complementary device at the interface protocol level. Beyond this, it facilitates early application development for reference board designs and production testing, before complementary devices are available in silicon. Further in the product cycle, it acts as a reference platform to help root-cause any incompatibilities between the device under development and the silicon device it is communicating with. Often, a developer of cutting edge silicon products with new standard interface protocols has no means of validating one’s design with complementary devices which themselves may be under development. When such complementary devices do become available, a full speed reference platform that faithfully adheres to the protocol and provides the accompanying software stacks is necessary to aid the bringup of a device trying to communicate with another for the first time, followed by rapid deployment of reference boards to OEM’s and production testing of the OEM’s end products.
The previous generations of these platforms address these challenges for interface protocols that require digital interfaces, like MIPI’s SLIMbus and HSI, and SDA’s SD3.0. Arasan delivers all these platforms with the hardware and software binaries, with rich runtime tracing and debug capabilities. The platform family extends these capabilities to complex protocols that require analog PHY layer interfaces like MIPI’s D-PHY and M-PHY, and SDA’s UHS-II. UFS and the upcoming MIPI LLI and CSI-3 are based on the MIPI Unipro link protocols, which are complex and multi-layered in both hardware and software.
“With the advent of increasingly complex, high speed serial connectivity protocols and the related time to market challenges, IP vendors need to move beyond silicon tapeout to end system product enablement. Arasan’s Hardware Validation Platforms augment its leading edge IP and software stack offering to do precisely that, and now with the third generation we have extended this capability to deliver Total IP Solutions for high speed serial protocols for mobile applications,” says Andrew Haines, Vice President of Marketing at Arasan Chip Systems.
The Hardware Validation Platforms for SD4.0, CSI-2/DSI, Unipro and UFS will be available in Q1 of 2012.
Arasan Chip Systems is a leading provider of Total IP Solutions for mobile storage and connectivity applications. Arasan’s high-quality, silicon-proven, Total IP Solutions include digital IP cores, analog PHY interfaces, verification IP, hardware verification platforms, protocol analyzers, software stacks and drivers and optional customization services for MIPI, USB, SD, SDIO, MMC/eMMC, CF, UFS, xD and many other popular standards. Arasan’s Total IP products serve system architects and chip design teams in mobile, gaming and desktop computing systems that require silicon-proven, validated IP, delivered with the ability to integrate and verify both digital, analog and software components in the shortest possible time with the lowest risk.
Based in San Jose, CA, USA, Arasan Chip Systems has a 15 year track record of IP and IP standards development leadership.