NurLogic's PHY Core Solves Designers' Needs For High-Speed Data Transfer Rates With Acceptable Pin Counts
SAN DIEGO, CA -- (INTERNET WIRE) -- 04/01/2002 -- NurLogic Design, Inc., a developer of high bandwidth connectivity solutions, today announced the availability of its AmberBridge™ HyperTransport™ physical interface (PHY) core, offering an aggregate bandwidth of 12.8Gbps. NurLogic's AmberBridge HyperTransport core is the industry's first to be delivered in 0.13-micron CMOS process technology. This innovative implementation gives designers the great flexibility they need for developing future equipment that requires high speed, high bandwidth data transfer rates. NurLogic's new core has been developed for designers of high performance networking, telecommunications, computers and embedded systems, consumer electronics and Internet connectivity devices.
HyperTransport interconnect technology is a new high-performance, low-latency, point-to-point link for interconnecting integrated circuits (ICs). HyperTransport complements externally visible bus standards like the Peripheral Component Interconnect (PCI), as well as emerging technologies including PCI-X, InfiniBand and 10Gb Ethernet. "As a member of the HyperTransport Technology Consortium, NurLogic can now provide customers with an important PHY core that is designed to industry specifications and allows for easy integration into next-generation designs," said Gabriele Sartori, HyperTransport Technology Consortium President. "As the communications industry continues to evolve, we believe NurLogic will continue to develop intellectual property that delivers first-time silicon success to its customers."
NurLogic's PHY core is an important building block used in the design of HyperTransport systems. This PHY core consists of three components: transmitter, receiver, and impedance calibrator, and relies on enhanced LVDS signaling technology. Testability features were incorporated into the core design allowing chip designers greater flexibility while placing cost management, performance and scalability into the hands of system developers. NurLogic's extensive experience in analog and digital high performance bus interfaces, connectivity I/Os and high-speed timing blocks such as PLLs, DLLs and CDRs helps to ensure first-time success with this technology.
"We believe HyperTransport technology plays a significant role in meeting the performance, bandwidth, and time-to-market demands of our customers," said Lisa Lipscomb, vice president of marketing for NurLogic. "NurLogic is in a unique position to deliver complex cores based on HyperTransport because of our extensive mixed-signal background."
The NurLogic AmberBridge HyperTransport PHY core is compliant with the HyperTransport Technology PHY Interface Specification (Version 1.01) and the HyperTransport I/O Link Protocol Specification (Version 1.03). NurLogic has performed compatibility testing with both GDA Technologies HyperTransport Tunnel IP and other popular RTL protocols. NurLogic offers this PHY core as a "hard" IP block that includes support for leading EDA tools and foundry technologies.
"Our customers are looking for a complete HyperTransport solution including logical and physical aspects," said Ravi Thummarukudy, vice president IC Division at GDA Technologies. "GDA and NurLogic have been working together to make sure that GDA's Tunnel RTL core and NurLogic's PHY core will provide pre-verified IP solution to our joint customers."
NurLogic will be participating in the HyperTransport USA Technical Tour on April 30. It will be held concurrently with the Real Time and Embedded Computing Conference at the Sheraton Framingham Hotel outside Boston. This is the first ever consortium technology event and the event is free of charge. The exhibition hall will be open 8:30 a.m. – 3 p.m. Members of the HyperTransport Technology Consortium will be participating. A morning seminar will be presented by MindShare, Inc. that will highlight key topics of the HyperTransport technology. Four other members will speak in the afternoon, including NurLogic. For more information, contact the RTC Group at www.rtcgroup.com, Boston April 30 or call 1.949.226.2000.
NurLogic's AmberBridge HyperTransport PHY core is currently available with pricing available upon request. NurLogic also provides strong application engineering support to help customers more easily integrate the AmberBridge HyperTransport PHY core into their designs.
About HyperTransport™ Technology
HyperTransport technology is a high-speed, high-performance, point-to-point link for integrated circuits, and is designed to meet the bandwidth needs of tomorrow's computing and communications platforms. HyperTransport technology helps reduce the number of buses while providing a high-performance link for PCs, workstations, and servers, as well as numerous embedded applications and highly scalable multiprocessing systems. It is designed to allow chips inside of PCs, networking and communications devices to communicate with each other up to 48 times faster than with some existing bus technologies.
About NurLogic Design, Inc.
NurLogic Design, Inc. provides high-bandwidth connectivity solutions to the networking and communications industries. NurLogic's products encompass customer-specific and industry-standard integrated circuits and semiconductor intellectual property to deliver value-add to its customers. NurLogic products are targeted at CMOS and silicon germanium technologies, and include high-speed connectivity IP, analog and mixed-signal IP, foundation IP, and PMD and PHY ICs. NurLogic is the recipient of the 2001 Most Innovative New Product (MIP) Award in a competition sponsored by the University of California-San Diego (UCSD) CONNECT program for its 48-channel optical interface chipset design. Based in San Diego, California, the company has regional sales offices in Massachusetts and Silicon Valley. NurLogic is a privately held corporation.
Headquarters: 5580 Morehouse Drive, San Diego, Calif. 92121. Tel: 1-877-NURLOGIC. On the web at www.nurlogic.com.