eSilicon Expands SerDes IP Licensing Agreement with Avago Technologies
Broad-based Access to 28nm-90nm SerDes Cores for eSilicon Customers
SUNNYVALE, Calif. — FEB 7, 2012 — eSilicon Corporation, the largest independent semiconductor value chain producer (VCP), announced today that eSilicon has expanded its existing agreement with Avago Technologies to include access to Avago’s 28nm, 40nm, 65nm and 90nm embedded SerDes cores. The agreement allows eSilicon to offer these high-performance cores and related IP as part of its custom chip development solution, positioning it to address the growing communications and storage ASIC markets. The SerDes cores support a broad range of popular industry standards such as PCI-Express, Fibre Channel, CEI, 10GBASE-KX/KX4/KR, FCoE, GigE, XAUI, and XFI/SFI and are suitable for both chip-to-chip and backplane applications. Avago Technologies has a long legacy of embedded SerDes technology leadership and has shipped more than 200 million SerDes channels. The SerDes cores offer very low jitter, making it possible to integrate many SerDes channels on a single chip.
“SerDes technology is clearly an area where Avago excels, and we are pleased to offer our customers access to an expanded SerDes IP portfolio and related IP bundle,” said Patrick Soheili, VP marketing, eSilicon. “Avago’s IP, combined with eSilicon’s design, productization and manufacturing operations expertise and our foundry partner TSMC’s manufacturing expertise provides our customers with a proven way to get a high-performance product to market quickly.”
“Avago’s IP engagement with eSilicon now spans four process generations,” said Frank Ostojic, VP and GM of Avago Technologies’ ASIC Products Division. “Our expanded agreement will allow eSilicon to serve a broader range of customers with high-performance, low-power requirements in process nodes ranging from 90nm down to 28nm.”
Avago’s SerDes cores are based on a modular, multi-rate architecture allowing hundreds of SerDes channels to be easily integrated on a single chip. The SerDes cores include a unique decision feedback equalization (DFE) feature resulting in a number of key performance differentiators such as low overall power, best-in-class data latency, and best-in-class jitter and crosstalk tolerance.
The Avago SerDes cores and the related IP bundle are available immediately to eSilicon customers. For more information, please visit eSilicon’s website or contact an eSilicon sales representative in your area.
About Value Chain Producers
A value chain producer (VCP) is a company that collaborates with foundries, IP and service providers, EDA suppliers, package, assembly and test operations in designing and producing chips for fabless IC, IDM and OEM companies. VCPs optimize the economics of customer value chains and enable customers to focus on their product differentiation and market growth.
About eSilicon
eSilicon, the largest independent semiconductor VCP, delivers ASICs to OEMs and fabless semiconductor companies through a fast, flexible, lower-risk path to volume production by deploying its comprehensive suite of design-through-manufacturing services and custom IP offerings. eSilicon serves a wide variety of markets including the communications, computer, consumer and industrial segments. www.esilicon.com
|
Related News
- eSilicon Licenses Avago Technologies' High Performance Embedded SerDes Cores
- MIPI Alliance and Automotive SerDes Alliance Enter Liaison Agreement to Enable Native MIPI CSI-2 Implementation with ASA-ML PHY
- Ansys Signs Definitive Agreement to Acquire Diakopto, Expands Multiphysics Simulation Portfolio for Semiconductor Designers
- MIPI Alliance and IEEE Sign Agreement to Bring Automotive SerDes Standard to Broader Ecosystem
- Cadence Expands Design IP Portfolio with 56G Long-Reach PAM4 SerDes on TSMC N7 and N6 Processes
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |