Silicon-Proven MIPI Low Latency Interface (LLI) Digital Controller IP Enables Smaller and Thinner Phones, Reduces Compatibility Risk
BARCELONA, SPAIN-- Feb 29, 2012 - MOBILE WORLD CONGRESS - Arteris Inc., the inventor and leading supplier of network-on-chip (NoC) interconnect IP solutions, today announced availability of its FlexLLI™ digital controller IP that implements the MIPI Alliance Low Latency Interface (LLI) 1.0 interchip communication specification. This chip-to-chip interface IP is silicon proven, having been implemented in the industry's first systems on chip (SoCs) that have LLI, including the OMAP5430 from Texas Instruments Incorporated (TI).
Arteris FlexLLI offers a point-to-point interconnect between two chips, such as a mobile phone application processor and modem baseband processor. Using this high bandwidth, low latency interconnect enables the modem baseband processor to access the application processor's dedicated DRAM memory for modem operation, thus eliminating a separate, dedicated modem baseband DRAM chip. Industry estimates translate this savings to an approximate $1 to 2 USD reduction in the total bill of materials cost for a smartphone. PCB board space and thickness is also saved, giving mobile device manufacturers a win-win solution to create smaller and thinner devices.
Arteris' FlexLLI digital MIPI LLI IP reduces design cost and compatibility risk while accelerating time to market. This configurable IP connects easily with SoC interconnects using AMBA AXI, OCP and proprietary protocols, as well as Arteris FlexNoC network on chip interconnect IP. FlexLLI also effortlessly interfaces with commercial MIPI M-PHY(SM) IP, such as the Synopsys M-PHY, as well as internally-developed M-PHYs. Arteris FlexLLI is the first LLI digital controller IP to be implemented by semiconductor vendors in SoCs.
Arteris has been a contributor in the MIPI Alliance LLI working group along with applications processor pioneer TI since the LLI investigation group was formed in 2009.
"TI developed the OMAP platform as a discrete architecture to create design flexibility through the attachment of companion chips including modems, bridges and more which require a low latency interface between the OMAP processor and the companion chip. TI invented the C2C interface, the first low-latency interface introduced in the market, and cooperated with Arteris on the next-generation chip-to-chip interface, which was brought to the MIPI Alliance and evolved into the LLI interface. TI's OMAP 5 application processors paired with partners' modems using LLI are leading the way with optimized system solutions," said Remi El-Ouazzane, vice president and general manager, OMAP platform business unit, TI.
For customers desiring a complete LLI digital controller and M-PHY solution, Arteris and Synopsys also announced a joint solution consisting of Arteris' FlexLLI MIPI LLI digital controller IP and Synopsys' DesignWare® MIPI M-PHY(SM) IP.
"Arteris FlexLLI IP is the most proven and easiest-to-implement path to MIPI LLI chip-to-chip connectivity," said Charlie Janac, president and CEO of Arteris. "Arteris FlexLLI customers are assured of a silicon-proven LLI solution with the fastest time to market and least design risk."
Arteris FlexLLI MIPI LLI IP is available today.
Arteris, Inc. provides Network-on-Chip interconnect IP and tools to accelerate System-on-Chip semiconductor (SoC) assembly for a wide range of applications. Results obtained by using the Arteris product line include lower power, higher performance, more efficient design reuse and faster development of ICs, SoCs and FPGAs.
Founded by networking experts and offering the first commercially available Network-on-Chip IP products, Arteris operates globally with headquarters in Sunnyvale, California and an engineering center in Paris, France. Arteris is a private company backed by a group of international investors including ARM Holdings, Crescendo Ventures, DoCoMo Capital, Qualcomm Incorporated, Synopsys, TVM Capital, and Ventech. More information can be found at www.arteris.com.