Matsushita licenses MoSys one-transistor SRAM for communications ICs
![]() |
Matsushita licenses MoSys one-transistor SRAM for communications ICs
By Semiconductor Business News
April 12, 2002 (4:17 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020412S0060
SUNNYVALE, Calif.--MoSys Inc. today announced it has licensed its one-transistor SRAM sell technology to Matsushita Communication Industrial Co. Ltd. in Japan for embedded design use in ICs for communications applications. Terms of the licensing agreement were not released. "As the industry continues to embed larger and larger quantities of high-performance memory on SoC [system-on-chip] designs, 1T-SRAM enables customers to reach new levels of performance, quality and cost that cannot be achieved with other embedded memory technologies," stated Mark-Eric Jones, vice president and general manager of intellectual property at MoSys in Sunnyvale. MoSys' 1T-SRAM technology has been licensed to a number of consumer and communications chip makers and foundries. It replaces conventional six-transistor SRAM cells that are often used in logic-based processes for SoC designs. MoSys said its licensees have already shipped more than 20 million ICs incorpora ting a total of over 1 billion megabits of 1T-SRAM embedded memory. In January, MoSys announced a new 0.13-micron 1T-SRAM-R memory macro, which adds what the company calls "Transparent Error Correction" to a new cell layout and eliminates 20% die-area penalty typically associated with error checking and correction (ECC) functions in traditional six-transistor SRAMs (see Jan. 28 story).
Related News
- UMC to port MoSys' one-transistor SRAM cell to advanced logic processes
- MoSys Announces Breakthrough Bandwidth Engine ICs and Serial Chip-to-Chip Communications Interface for Next Generation Networking Applications
- MoSys Licenses 1T-SRAM for Advanced 55NM Process Technology to NEC Electronics
- Fujitsu Licenses MoSys 1T-SRAM(R) Technology for Its Leading-Edge 65nm Semiconductor Manufacturing Process
- Teknovus Licenses MoSys 1T-SRAM(R) for Their Gigabit Ethernet Passive Optical Network (GEPON) Chip Sets
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |