OpenVera IP Complements the Synthesizeable RTL Core Provided by GDA and Accelerates Verification of HyperTransport Compliant Devices
SAN JOSE, Calif. -- April 15, 2002-- GDA Technologies, Inc., a fast growing supplier of intellectual property (IP) and design services, today announced the availability of OpenVera™ verification IP for the HyperTransport™ protocol. This verification IP, based on the OpenVera hardware verification language, complements the synthesizable core for HyperTransport Tunnel available from GDA and provides users with a highly sophisticated verification environment for this complex protocol. This verification IP contains pre-built and pre-verified modules for generating HyperTransport transactions and monitors,enabling users to reduce total verification time.
HyperTransport interconnect technology is a new high-speed, low latency, point-to-point link for integrated circuits (ICs), developed to enable chips inside high-performance computer, networking and communications devices to communicate with each other faster than with existing technologies.
"By delivering this OpenVera verification IP, along with our already released Tunnel RTL synthesizable core, GDA is taking a leadership position as the provider of key HyperTransport technologies," said Ravi Thummarukudy, vice president of IC Design Services at GDA Technologies. "Our suite of OpenVera verification IP, synthesizable RTL and design services address the design, verification and integration aspect of HyperTransport Technology in our customers' designs."
"One of our objectives is to give the OpenVera community access to complete solutions for a large array of verification challenges," said Jim Watts, OpenVera program manager at Synopsys, Inc. (Nasdaq:SNPS) "We live in a fast-paced world where technology is rapidly evolving. The development of verification IP solutions for emerging protocols like HyperTransport plays a critical role in helping the OpenVera user community maximize their design and debug productivity and reduce the time-to-market verification bottleneck."
Key features of GDA OpenVera verification IP
• Compliant with HyperTransport I/O Link Specification, version 1.03
• Highly modular test bench design with host controller and cave models and protocol checkers
• Layered architecture for each testbench object
• Highly configurable testbench to support all the interface widths, frequencies and data rates
• Performs traffic generation, reception and checking
• Checks protocol compliance at signal level and transaction level
• Supports double hosted chains
• Supports peer-to-peer communication
• Exhaustive, targeted and random tests to provide very high functional coverage
• Elaborate documentation to enable customization of the upper layers and addition of test cases
"Availability of re-useable synthesizable cores and OpenVera IP is a strong enabler for the adoption and proliferation of HyperTransport Technology," said Gabriele Sartori, president of the HyperTransport Technology Consortium. "Availability of this verification IP from GDA, a contributing member of the HyperTransport Technology Consortium, will enable timely delivery of high-quality HyperTransport-based designs."
About HyperTransport™ Technology
HyperTransport technology is a high-speed, high-performance interconnect for integrated circuits that provide a universal connection designed to reduce the number of buses within the system. It provides a high-performance link for networking and embedded applications, and enables highly scalable multiprocessing systems. It is designed to enable the chips inside PCs, servers, networking and communications devices to communicate with each other up to 48 times faster than existing bus technologies. HyperTransport technology enables system designers to develop very complex, high-performance, scalable networking topologies through switching technology, while maintaining and improving the scalability and performance of their existing legacy PCI infrastructures. Additional information about HyperTransport technology or the HyperTransport Consortium can be accessed at www.hypertransport.org
OpenVera is an open source hardware verification language developed specifically to meet the unique requirements of functional verification. The language enables users to describe the target application environment, including complex protocols and data objects, at a high level of abstraction, which dramatically increases productivity, readability and reusability.The latest OpenVera developments will be featured at the ninth semiannual Synopsys EDA Interoperability Developers' Forum in Sunnyvale, CA on Tuesday, April 16, 2002.For more information on OpenVera, visit www.open-vera.com
About GDA Technologies
GDA Technologies, Inc. is a leading design services company with high value IP, value added design services and flexible engineering resources around the world targeting the embedded, networking, and consumer electronics markets. GDA focuses on designing systems, boards, SoCs, ASICs, FPGA's and IP from concept to product. GDA has successfully developed products in the areas of Compact PCI, handheld embedded solutions, digital video applications, Internet appliances, voice and data networking applications, and non-form factor PC architectures. GDA is headquartered in San Jose, CA and has satellite design centers in Boston, Sacramento, Singapore, Chennai and Bangalore, India. For more information on GDA Technologies, please visit www.gdatech.com
GDA Technologies, Inc. and the GDA logo are registered trademarks of GDA Technologies, Inc. HyperTransport is a trademark of the HyperTransport Technology Consortium. Synopsys is a registered trademark of Synopsys, Inc. OpenVera is a trademark of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.