Grenoble, France – April 20, 2012. Dolphin Integration, the leader in virtual components of mixed signal IP for high-resolution and power-optimized subsystems, reveals its latest innovations. The leading product of the new offering enables the “Apparent NVM Memory”, namely the Stratus cache controller, as it reverses the traditional looks: it is not tied to a single processor for mere speed, nor limited to specific access statistics.
The “Apparent NVM Memory” enables customers, targeting applications with large embedded program memories such as smart card devices, to benefit from:
1- Drastic improvement of processing power
- Up to 2 times faster when compared to a cache-less Non-Volatile Memory!
2- Decrease of power consumption
- At least 50% reduction compared to a mere NVM!
3- Easy set up
- Dynamic self adaptation of cache configuration to adjust power depending on the access statistics of the application program
Stratus can also be used in association with other types of Non-Volatile Memories such as OTP and EEPRom.
For additional power savings, Stratus can be associated with the Dolphin's Low-Power SRAM, as their features perfectly match the needs of smart card applications:
high-speed SRAM architecture, robustness for low voltage operation for both leakage and dynamic power reduction, byte-write and bit-wise capability for the best flexibility, and peak-current modelling.
For immediate acquaintance with the return of this product, have a quick look at the presentation sheet or else visit or website (www.dolphin-integration.com) or contact email@example.com
About Dolphin Integration
Dolphin Integration is up to their charter as the most adaptive and lasting creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation as well as independence and partnerships with Foundries. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components, such as mixed signal high-resolution converters for audio and measurement applications, Libraries of memories and standard cells, Power management networks, Microcontrollers. The strategy is to follow product launches with evolutions addressing future needs, emphasizing resilience to noise and drastic reductions of power-consumption at SoC level, thanks to their own missing EDA solutions enabling Support Engineering with Application Hardware Modeling as well as early Power and Noise assessment, plus engineering assistance for Risk Control.