Bytom, 25th of April, 2012 -- Digital Core Design, IP Core provider from Poland introduced its latest UART core. Though the name suggests that it is dedicated only for 950, it also offers full compatibility with the most popular industry standards: 450, 550, 650, 750 and of course 950. Moreover, DCD’s IP supports IRDA data format mode, which combined with unique multitasking makes this IP Core one of the most advanced and flexible UART core.
Some say that UART should be named as a holy grail of every microcontroller. So if the market needs faster, more efficient and sophisticated MCUs, the same story goes with UARTs. Need for speed forces advanced solutions, both in software and hardware data flow control. That’s why D16950 enables Fast Mode - when normally 16 samples per bit are being sampled, then in Fast just 4-15. The Core is perfect for applications, where the UART Core and microcontroller are clocked by the same clock signal and are implemented inside the same ASIC or FPGA chip – says Jacek Hanke, CEO Digital Core Design - Nevertheless it's also proprietary solution for standalone implementation, where several UARTs are required to be implemented inside a single chip, and driven by some off-chip devices. Thanks to universal interface, D16950 core implementation and verification are very simple, just by elimination a number of clock trees in complete system.
The D16950 UART is functionally identical to the OX16C950, and as was mentioned above – fully compatible with the most popular industry standards: 450, 550, 650 and 750. It allows serial transmission in two modes: UART mode and FIFO mode. In the second one internal FIFOs are activated, allowing 128 bytes (plus 3 bits of error data per byte in the RCVR FIFO) to be stored in both receive and transmit modes.
D16950 includes also a programmable baud rate generator, which is capable to divide the timing reference clock input by divisors of 1 to (216-1) and produce a n × clock for driving the internal transmitter logic. Provisions are also included to use this n × clock to drive the receiver logic. DCD’s IP Core is also equipped with complete MODEM-control capability and processor-interrupt system. It is fully customizable - interrupts can be programmed in accordance to specific requirements, minimizing the computing required to handle the communications link.
As all DCD’s UART Cores, D16950 includes fully automated testbench with complete set of tests allowing easy package validation at each stage of SoC design flow.
More information at: http://dcd.pl/ipcore/130/d16950/
Datasheet available here: http://dcd.pl/workspace/documentation/gen/d16950_ds.pdf
Information about Digital Core Design:
Digital Core Design is a leading Intellectual Property (IP) Core provider and System-on-Chip (SoC) design house. The company was founded in 1999 and since the early beginning is considered as an expert in IP Cores architecture improvements. Thousands of customers became convinced by our unique solutions and billions of people worldwide use our technology in USB, MP3 players, mobile phones and many others.
The innovativeness of DCD's IP solutions has been confirmed by over 300 licenses sold to over 200 customers worldwide, such as: INTEL, SIEMENS, PHILIPS, TOYOTA, OSRAM, GENERAL ELECTRIC, SILICON GRAPHICS, RAFAEL, SAGEM or GOODRICH.