Fast Processor Models of MIPS Technologies New Aptiv Generation Cores Released by Imperas and Open Virtual Platforms

OVP Fast Processor Models Developed Under MIPS-Verified(tm) Program

OXFORD, United Kingdom, May 11, 2012 - Imperas(tm) is releasing the Open Virtual Platforms(tm) (OVP(tm)) Fast Processor Models for MIPS Technologies new Aptiv(tm) Generation of processor cores. Example virtual platforms are also being released, as well as support for the cores in Imperas M*SDK(tm) advanced software development tools. MIPS Technologies has verified the functionality of the Aptiv models under the MIPS-Verified(tm) program.”

The processor core models and example platforms are available from the Open Virtual Platforms website, http://www.OVPworld.org/MIPS. The models of the Aptiv processor cores, as well as models of other MIPS(R)

“Our new Aptiv Generation of cores pushes the boundaries in performance and efficiency. Having MIPS-Verified support from Imperas and OVP, a leading supplier of high-quality, fast processor core models, enables our customers to get started immediately with designs based on the Aptiv Generation cores,” said Giddy Intrater, vice president of marketing, MIPS Technologies. .

processors, work with the Imperas and OVP simulators, and have shown exceptionally fast performance of hundreds of millions of instructions per second.

All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the native TLM-2.0 interface available with all OVP processor models. The OVP simulator also has integration into an Eclipse IDE, enabling easy use for software developers. In addition to working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and debug, including key tools for software development on virtual platforms such as OS and CPU-aware tracing, profiling and code analysis.

The OVP library of Fast Processor Models includes the complete families of the ARMv4, ARMv5, and ARMv6 architecture-based processors, as well as models of most of the processors in the ARM Cortex-M series and Cortex-A series processors. In addition to working with the OVP simulator, these models work with the Imperas Multiprocessor/Multicore Software Development Kit, M*SDK, which includes advanced tools for multicore software verification, analysis and debug, including key tools for software development on virtual platforms such as OS and CPU-aware tracing, profiling and code analysis.

“State of the art processor cores, especially multicore processors, such as these new Aptiv cores from MIPS require state of the art software development tools,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “OVP Fast Processor Models, which are faster, more accurate and easier to use than other models, accelerates the development cycle and makes debug and optimization easier for software engineers.”

OVP offers MIPS developers access to all of the MIPS32(R) 32-bit processor models, including the MIPS32 4K, 24K, 34K, 74K, 1004K, 1074K and M14K families of cores. OVP also has reference virtual platforms incorporating the MIPS cores, including bare metal platforms and a virtual platform of the MIPS Malta development board. This Malta virtual platform enables users to boot Linux in under 5 seconds on a 2GHz laptop using OVPsim, and to boot multicore SMP (Symmetric Multi-Processor) Linux in less than 8 seconds. These reference platforms are all available as source code, and are easily modified to add or change the memory and peripheral components to customize the platform as required for software development.

In addition to working with the OVP simulator OVPsim, the OVP Fast Processor Models work with the Imperas Multiprocessor/Multicore/Multithread Software Development Kit (M*SDK). These advanced tools for multicore software verification and analysis include key tools for software development on virtual platforms such as OS and CPU-aware tracing (instruction, function, task, event), hot spot profiling, code coverage and memory and cache analysis. The M*VAP (Verification, Analysis and Profiling) tools utilize the Imperas SlipStreamer(tm) patent pending binary interception technology. SlipStreamer enables these analytical tools to operate without any modification or instrumentation of the software source code, i.e., the tools are completely non-intrusive.

About Imperas (www.Imperas.com)

For more information about Imperas, please go to the Imperas website.

About the Open Virtual Platforms Initiative (www.OVPworld.org)

For more information about OVP, please go to the About OVP page on the OVP website. Detailed quotations regarding OVP are available from http://www.ovpworld.org/quotes.