PLDA's PCIe Gen3 Soft IP demo will be available for review at the DAC Conference in San Francisco, CA., June 3-7, 2012
SAN JOSE, Calif., Jun 01, 2012 -- PLDA, the industry leader in PCI Express(R) and high-speed interface IP, today announced it will be debuting a live PCIe(R) x8 Gen3 demo featuring PLDA's leading PCIe Gen3 soft IP core and running on a Xilinx Kintex-7 FPGA during the DAC Conference, June 3 -7 in San Francisco, CA. The PLDA PCIe Gen3 IP core is the first to run on a -2 medium speed grade Xilinx Kintex-7 FPGA while consuming only a fraction of available device resources, allowing unmatched design flexibility.
PLDA is an established leader in PCIe(R) interface IP, with over 2000 designs in production silicon since its inception. With significant design firsts including the first working PCIe(R) Gen3 IP solution for both ASIC and FPGA and key PCIe(R) design-wins from leading companies, PLDA is the industry's clear choice for PCIe(R) IP cores.
Key features of PLDA Gen3 IP Core for Xilinx FPGA include:
- Supports PCIe 3.0 at Gen3, Gen2, Gen1 speeds, in x1, x2, x4, x8
- Backwards-compatible to PCIe 2.0 at Gen2/Gen1 speeds and PCIe 1.1
- Targeted to Xilinx Kintex-7 and Virtex-7 in -2 medium speed grade
- Available with AMBA AXI4 or Tx/Rx user interface
- Optional advanced integrated multi-channel DMA
- Complete solution including IP core as encrypted RTL or source code, bus functional models, software design kit, reference designs and complete technical support by IP experts
The PLDA Gen3 IP portfolio includes QuickPCIe - A highly configurable PCIe IP with advanced AXI4-based DMA, and XpressRICH3 - An ASIC-grade PCIe IP with advanced features. For more information on the PLDA PCIe Gen3 IP offering for Xilinx FPGA, please visit http://www.plda.com/
"PLDA has become known as a go-to partner for PCIe and reliable high-speed interface IP solutions, consistently pushing the design envelope for our customers," said Stephane Hauradou, CTO for PLDA. "Our commitment to leading performance, ease of IP integration and quality assurance ensures that PLDA is the industry's PCIe(R) IP vendor of choice."
See the PCIe Gen3 Demo at DAC:
The PLDA PCIe Gen3 IP core running on Xilinx KC705 board will be demonstrated live in PLDA's booth, #2714 at the DAC conference, from June 3-7, 2012 in San Francisco, CA. For more information on the conference, please visit http://www.dac.com .
PLDA designs and sells intellectual property (IP) cores for FPGA and System-on-Chip (SoC) that aim to accelerate time-to-market for embedded electronic designers. PLDA specializes in high-speed interface protocols and technologies such as PCI, USB, and Ethernet.
PLDA IP cores are provided with a complete set of tools, including FPGA prototyping cards, drivers and APIs, testbenches and benefit from a global sales and support organization able to sustain over 2,000 customers worldwide.
PLDA is a global company with offices in San Jose, California and Aix en Provence, France. For more information visit www.plda.com .