Dylan McGrath, EETimes
6/4/2012 3:23 AM EDT
SAN FRANCISCO—A design methodology based largely on intellectual property (IP) reuse employing minimal new design work to add proprietary value is being used by chip firms to create high-end system-on-chips (SoCs) with significantly lower costs, according to veteran EDA analyst Gary Smith.
In his annual address preceding the Design Automation Conference (DAC) here Sunday, Smith, chief analyst at Gary Smith EDA, said the methodology, which he calls multi-platform based design methodology, uses previously developed software, UP which includes verification suites and significantly fewer IP blocks than typical large designs in recent years.
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