Dolphin Integration sRAM compiler completes TSMC IP9000 Level 1 qualification at 85 nm Ultra Low Power process
Grenoble, France – June 15, 2012. Dolphin Integration announces that the new memory architecture RHEA has now passed the Level 1 criteria of TSMC’s stringent IP9000 qualification program.
“We are happy to announce that RHEA, the latest innovation of Dolphin’s sRAM family is now available free of charge, for all TSMC 85 nm Ultra Low Power process Users”, said Elsa BERNARD-MOULIN, Dolphin Integration Marketing Manager for Libraries.
The Single Port RAM compiler RHEA is specially suited for consumer applications such as flash controllers and bridge interfaces. Indeed it provides the highest density with the smallest power consumption, leaving far behind the competing sRAM implementations available at 90 nm LP.
Thanks to the combined benefits of TSMC’s bit-cell with Dolphin’s smart sRAM architecture, the lucky users of the TSMC 85 nm Ultra Low Power process can enjoy up to 15% area savings on their memory cuts, and up to 40% leakage reduction and up to 50% dynamic power reduction compared to existing 90 nm LP memory generators.
As an example, one SpRAM RHEA memory cut of 2kx32 achieves a power consumption as low as 17.5 uA/MHz for an area of 0.083 mm2!
For even further power reduction, low voltage and dual voltage variants of the RHEA compiler also are available to ensure safe operation down to 1.0 V ± 10%.
For more information, feel free to download the Presentation Sheet or to contact Elsa BERNARD-MOULIN at ragtime@dolphin.fr
Availability:
The SpRAM RHEA generator is available for free download http://www.dolphin.fr/flip/libraries/forms/libraries_form_contact.php?id_gene=sRAM85_LP&level=evaluation_Kit&product=spRAM_RHEA_HD.RR_85uLP and use by 85 nm Ultra Low Power process Users.
For more information about Dolphin Integration product portfolio and IP 9000 status, please contact us at ragtime@dolphin.fr
About Dolphin Integration
Dolphin Integration is up to their charter as the most adaptive and lasting creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation as well as independence and partnerships with Foundries. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components, such as mixed signal high-resolution converters for audio and measurement applications, Libraries of memories and standard cells, Power management networks, Microcontrollers. The strategy is to follow product launches with evolutions addressing future needs, emphasizing resilience to noise and drastic reductions of power-consumption at SoC level, thanks to their own missing EDA solutions enabling Support Engineering with Application Hardware Modeling as well as early Power and Noise assessment, plus engineering assistance for Risk Control
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