Hsin-Chu, Taiwan and San Jose, Calif., April 22, 2002 -- Continuing on their commitment to innovation, Altera and TSMC today announced their technology collaboration based on TSMC's Nexsys™ technology for system-on-chip (SoC) design. The collaboration focuses on development of programmable logic devices (PLDs) at the 90-nanometer (nm) process node. This milestone marks another industry first for the two companies, extending a partnership that has already resulted in several market-leading innovations. Altera will leverage the Nexsys technology for future-generation PLDs and expects to realize a performance increase up to 30 percent as well as significant cost savings resulting from the combination of smaller die size and larger 300-mm semiconductor wafers.
"Altera's PLD products have a unique combination of features -high-density, high-performance transistors, dense interconnects, and well-characterized memory structures - that are ideal for optimization to new process geometries," said Francois Gregoire, Altera vice president of technology. "Our successful partnership with TSMC is built on a shared commitment to delivering these features on the most advanced process technology available to our mutual customers."
Altera's engagement with TSMC began early in the development design rule definition for TSMC's Nexsys 90-nm process. With Altera's input, TSMC was able to specify a process that supports targeting of Altera's PLD products to the Nexsys platform, enabling faster time-to-market for users of Altera's next generation of PLDs.
"Our collaboration with Altera stretches back to the beginnings of both companies," said Genda Hu, vice president of marketing for TSMC. "Altera's commitment to innovation makes them an ideal partner in the development of new process technologies, and their unfailing commitment to TSMC puts them squarely on our roadmap for volume production using Nexsys technology."
The collaboration strengthens the partnership between Altera and TSMC -a partnership that most recently included shipment of the industry's first 0.13-micron all-copper process for PLDs. The collaboration will enable optimized transistors, increased performance, and a reduction in standby power, all on 10 layers of copper and featuring low-k dielectrics.
Nexsys is the industry's next-generation technology for SoC semiconductor design and manufacturing at the 90-nm node. Nexsys 90-nanometer process technology features design rules, electrical, and transistor characteristics and performance requirements collaboratively defined with leading IDM and fabless companies worldwide. Nexsys design rules and SPICE models are available now to select customers.
Process options include a general-purpose version (CLN90G), a high-speed version (CLN90HS) and a low-power version (CLN90LP) for computer, graphics, consumer, network, and wireless applications. A mixed-signal/RF CMOS version (CMN90) will also be provided for high-performance analog applications, such as high-bandwidth networks. The high-speed versions of the process will support operating speeds in the multi-Gigahertz range.
The Nexsys SoC technology consists not only of process technology, but also a design environment and associated intellectual property (IP) and libraries. TSMC expects to begin first production of Nexsys-based 90-namometer customer devices on 200-mm wafers in the third quarter of 2002, followed by 300-mm wafers beginning in the first quarter of 2003.
For more information, visit http://www.tsmc.com.tw/technology/index.html ###
Altera Corporation (Nasdaq: ALTR) is the world's pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at http://www.altera.com.
TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology and the foundry industry's largest portfolio of process-proven library, IP, design tools and reference flows. The company has one advanced 300mm wafer fab in production and one under construction, in addition to six eight-inch fabs and one six-inch wafer fabs. TSMC also has substantial capacity commitments at two joint ventures fabs (Vanguard and SSMC) and at its wholly owned subsidiary, WaferTech. In early 2001, TSMC became the first IC manufacturer to announce a 90-nanometer technology alignment program with its customers. TSMC's corporate headquarters are in Hsin-Chu, Taiwan. For more information about TSMC please go to http://www.tsmc.com.