MUNICH -- Infineon Technologies AG today announced an alliance with PacketVideo Corp. of San Diego and sci-worx GmbH of Hannover, Germany, to tightly integrate multimedia technologies with Internet modem chips and application processors for next-generation handsets.
The three-way partnership aims to use PacketVideo's mobile media software with sci-worx's video acceleration technology and Infineon's modem and application processors to provide wireless handset manufacturers with end-to-end solutions for mobile phones supporting full animation, moving pictures, and high-quality sound. The partners are targeting mobile phones using General Packet Radio Service (GPRS) and Universal Mobile Telephone Service (UMTS) standards for multimedia capabilities.
"The integration of PacketVideo's multimedia software and sci-worx hardware accelerators into our wireless chip offerings will enhance next generation mobile devices with full featured multimedia s ervices," said Ulrich Hamann, chief executive officer of Infineon's Business Group for Wireless Solutions.
Infineon cited market estimates from the ARC Group, which predicts that sales of mobile phones with streaming video capability will grow to more than 90 million units in 2005. ARC said these volumes will exceed 150 million units in 2006.
PacketVideo's pvPlayer, pvAuthor and pv2WAY software has been ported to and optimized for Infineon's first multimedia application processor demonstrator. Infineon is one of many investors in PacketVideo, which has also received funding from Intel, Motorola, Philips, Sony, Sun, and Texas Instruments. The company's multimedia products are aimed at standards-compliant solutions for encoding, transmission, and decoding software of audio, video, branded content and applications in mobile devices.
Hannover-based sci-worx has also collaborated with Infineon to develop hardware accelerators that offload compute-intensive tasks from core processors in handsets. The 1 2-year-old company has a library of over 65 "soft" design cores for embedded accelerators that are available as synthesizable ASIC cores.