Grenoble, France - August 24, 2012 -- The speed champion in the 16-bit Flip80251 family is Tornado. Its code is not only upward compatible with the i80251 legacy, but it also offers the extension of the WHIRL interface for coprocessors of encryption or of analog signal processing:
- The Flip80251 Tornado is accelerated 67 times from the i80C51 and by 5.3 times from the i80C251, running the Dhrystone V2.1 / 10,000 loops.
- The power consumption is thus decreased to less than 150 µA/DMIPS in typical conditions on TSMC 0.18 μm G process including clock tree consumption using a Dolphin library.
Flip80251 Tornado is provided with its wide set of peripherals: watchdog timer, enhanced UART, I2C & SPI master or slave interfaces, cache controller etc. Tornado embeds its Built-In Real-time Debug BIRD Owl with 2 (DSPI) or 4 wire (JTAG) interfaces offering all features for fast program development and debug.
For applications requiring Data and Signal Processing, Tornado paves the way to a family of WHIRL co-processors, with dedicated ALU and DMA enabling a combined processing power superior to any 32-bit single core architecture. These co-processors are optimized to fit to volume applications like Audio or Smart Cards.
For benefitting from the advantages of Flip80251 Tornado, check its presentation or contact email@example.com.
About Dolphin Integration
Dolphin Integration is up to their charter as the most adaptive and lasting creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation as well as independence and partnerships with Foundries. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components, such as mixed signal high-resolution converters for audio and measurement applications, Libraries of memories and standard cells, Power management networks, Microcontrollers. The strategy is to follow product launches with evolutions addressing future needs, emphasizing resilience to noise and drastic reductions of power-consumption at SoC level, thanks to their own missing EDA solutions enabling Support Engineering with Application Hardware Modeling as well as early Power and Noise assessment, plus engineering assistance for Risk Control