Co-developed Ethernet IP Speeds 40G and 100G Networking IC Development
MILPITAS, Calif. -August 29, 2012: Open-Silicon, Inc., a leading semiconductor design and manufacturing company, today announced the launch of a 40G/100G Ethernet media access controller (MAC) IP and 40G/100G physical coding sublayer (PCS) IP, co-developed with CoMira Solutions, Inc. The co-developed IP, sold by Open-Silicon as stand-alone IP or as a part of an Open-Silicon customer-specific product development, is compliant with the IEEE 802.3ba standard. When combined with Open-Silicon's industry-leading Interlaken, Hybrid Memory Cube (HMC) or DDR3 controllers, the high-performance Ethernet IP offers a complete IP solution for networking applications.
The co-development model brings together CoMira's depth of expertise with high speed Ethernet technology and Open-Silicon's broad experience in IP qualification and integration to create a rigorous design, verification, and qualification process. For these two cores, this design and verification process includes FPGA emulation, documentation review, UNH compliance testing, and comprehensive timing and functional verification. For qualification, prior to release all Open-Silicon IP cores go through Open-Silicon's IP qualification process, which has been developed and continually enhanced through the successful integration of over 900 IP cores.
"Our customers have been asking for high quality leading edge Ethernet IP for their next generation products, including Ethernet 40G/100G MACs," said Steve Erickson, vice president & GM IP and Platform Development, Open-Silicon. "By partnering with CoMira, we are able to offer a full, low risk solution to help customers get to market faster."
"Today's chip designers and suppliers face significant challenges integrating an increasingly disparate collection of third-party IP," said Qasim Shami, president and CEO of CoMira Solutions. "By co-developing our IP with Open-Silicon, our customers will benefit from a more tightly-coupled IP & silicon development platform, enabling a higher degree of predictability and faster time to market."
The 40G/100G MAC and PCS are highly modular enabling system level solutions from 10G to 100G, and are ideal for low-latency applications such as data center switches where higher performance is required. The small footprint implementation leads to lower gate counts and smaller die sizes, which allow for an efficient design in high-port count devices. Built on a highly configurable architecture supporting a number of different SerDes configurations and user interface options, the 40G/100G MAC and PCS IP cores can be quickly tuned to meet user requirements. Comprehensive system-level verification and automated infrastructure, including a web-based IP builder, allows for quick trade-off analysis and system-level integration.
Open-Silicon Co-developed IP
Open-Silicon co-developed IP includes the customization and qualification that all IP requires. In addition, Open-Silicon provides a sales and marketing channel and customer support to enable rapid integration of the IP core into today's designs. For more information, contact Open-Silicon at +1-408-240-5700 or IP@open-silicon.com.
About Open-Silicon, Inc.
Open-Silicon a leading supplier and developer of customer-specific products (CSPs) leveraging the industry's best technology from both Open-Silicon and the open market. Developing customized solutions for each program including ASIC spec-to-parts, IP and platforms, Open-Silicon provides customers with fast access to leading edge product development. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.
About CoMira Solutions
CoMira Solutions is an expert provider of application optimized semiconductor IP and full turn-key ASIC design services. Lead by a veteran team of SoC developers, CoMira leverages its deep system knowledge to deliver high value, differentiated IP solutions for the Networking, Storage, and Wireless markets. For more information, visit CoMira's website at www.comira-inc.com.