Freescale Boosts Verification Productivity with Synopsys Verification IP
Companies Extend SoC Verification Collaboration on Simulation, Debug and Verification IP
MOUNTAIN VIEW, Calif., Jan. 21, 2013 -- Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced advancements in its longstanding verification collaboration with Freescale® Semiconductor. With a focus on addressing the increasing complexities of system-on-chip (SoC) verification, Freescale teams are leveraging Synopsys' innovations in next-generation verification IP (VIP), simulation performance, debug technology and methodology development. This collaboration is targeted to achieve better schedule predictability and lower overall verification costs for Freescale's complex SoCs.
"Over the last few years, our designs have led a very aggressive roadmap of SoC platforms with considerable verification challenges. Now, with the increasing use of standards-based IPs, verification challenges shift to finding the fastest and most effective way to validate the integration of complex protocols with our differentiated SoC content, while boosting debug and simulation performance," said Ken Hansen, vice president and chief technology officer at Freescale Semiconductor. "Synopsys' simulation and VIP portfolio provides our teams with increased performance, UVM support, and advanced debug capabilities."
"This strategic collaboration with Freescale builds on the successful engagement we have had for more than a decade," said Manoj Gandhi, senior vice president and general manager of the Synopsys Verification Group. "We appreciate our mutual collaboration and look forward to continuing to deliver next-generation verification technology that addresses Freescale's SoC verification challenges."
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, its software, IP and services help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems. Learn more at www.synopsys.com.
|
Synopsys, Inc. Hot IP
Synopsys, Inc. Hot Verification IP
Related News
- Freescale and Synopsys Announce Multi-year Strategic Collaboration Agreement to Increase Verification Productivity
- Synopsys Boosts 5G SoC Development Productivity with New RF Design Flow for TSMC N6RF Process
- Synopsys Announces Euclide to Accelerate Design and Verification Productivity
- InterMotion Technology boosts IP verification productivity for Lattice Semiconductor's CrossLink FPGA family using Aldec's Active-HDL
- Synopsys Enables Next-Level of Productivity with Addition of System-Level Capabilities to Verification IP for ARM Cache Coherent Protocols
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |