Globalfoundries commits to FDSOI process
Peter Clarke, EETimes
2/7/2013 4:34 AM EST
LONDON – Globalfoundries Inc. has set out a timetable to the high volume production of fully-depleted silicon-on-insulator (FDSOI) chips making the mainstream adoption of the process possible. Globalfoundries (Milpitas, Calif.) had previously signed a memorandum of understanding to manufacture the process with the developer, STMicroelectronics NV (Geneva, Switzerland).
Mike Noonen, executive vice president of worldwide marketing and sales at the foundry chip maker, told an audience at the Common Platform Technology Forum, held at the Santa Clara Convention Center, California, that a physical design kit for the process will be available in the first quarter of 2013.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Related News
- VeriSilicon Announces Ultra Low Power BLE 5.0 RF IP Based on GLOBALFOUNDRIES 22FDX FD-SOI Process for IoT Applications
- GLOBALFOUNDRIES Announces Industry's Most Advanced Automotive-Qualified Production FD-SOI Process Technology
- Synopsys Design Platform Certified by GLOBALFOUNDRIES for 22nm FD-SOI Process Technology
- Synopsys Joins GLOBALFOUNDRIES' FDXcelerator Partner Program to Enable Innovative Designs Using the FD-SOI Process
- Globalfoundries Working on Next-Gen FDSOI Process
Breaking News
- IAR Systems fully supports the brand-new Industrial-Grade PX5 RTOS
- Axiomise Accelerates Formal Verification Adoption Across the Industry
- Fluent.ai Offers Embedded Voice Recognition for Cadence Tensilica HiFi 5 DSP-Based True Wireless Stereo Products
- intoPIX to feature TicoXS FIP technology for premium 4K & 8K AVoIP wireless AV at ISE 2023
- Sevya joins TSMC Design Center Alliance
Most Popular
- Weebit Nano nears productisation, negotiating initial customer agreements
- Cadence Quantus FS Solution, a 3D Field Solver, Achieves Certification for Samsung Foundry's SF4, SF3E and SF3 Process Technologies
- Sevya joins TSMC Design Center Alliance
- Avery Design Systems and CoMira Announce Partnership To Enable UCIe-Compliant Chiplet Design
- Open Compute Project Foundation and JEDEC Announce a New Collaboration