SANTA CLARA, CA, – February 28, 2013 – eASIC Corporation, a provider of NEW ASIC devices, today announced that Violin Memory, provider of one of the world’s fastest and most scalable FLASH memory arrays, has selected eASIC’s Nextreme-2T NEW ASICs for implementing FLASH controllers for its latest 6000 Series enterprise-grade FLASH memory arrays.
Violin cites vastly superior power consumption and cost as the key reasons for replacing high-density FPGAs with eASIC Nextreme-2T devices within its FLASH storage arrays. In addition, the fast design and turnaround time of Nextreme-2T NEW ASICs enables Violin to ramp to high volume quickly and establish a strong market lead in the fiercely competitive market for FLASH memory-based enterprise storage appliances.
“We looked at a number of ASIC platform choices for implementing our custom FLASH controllers,†commented Kevin Rowett, vice president of engineering for Violin Memory Inc. “We opted to collaborate with eASIC for reducing cost and power consumption because their Nextreme-2T NEW ASICs enabled us to quickly migrate from FPGAs, and inexpensively ramp our solutions to high volume production.†added Rowett.
“There is tremendous innovation going on in the enterprise storage market and we are thrilled to be working with Violin Memory, one of the fastest growing leaders in this space,†said Ronnie Vasishta, President and CEO, eASIC Corporation. “OEMs need to continuously innovate and quickly ramp to volume production. We are starting to see a tipping point where FPGAs cannot be used in mission critical, power sensitive, volume applications and the ASIC alternatives do not meet the requirements. Traditional cell-based ASICs just take too long to design and ASSPs have limited flexibility for the NAND FLASH interface†added Vasishta.
About eASIC
eASIC is a fabless semiconductor company offering breakthrough NEW ASIC devices aimed at dramatically reducing the overall cost and time-to-production of customized semiconductor devices. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology utilizing Via-layer customizable routing. This innovative fabric allows eASIC to offer a new generation of ASICs with significantly lower up-front costs than traditional ASICs.