Grenoble, France – May, 24 2013. Dolphin Integration, the leading provider for innovative libraries of standard cells and low-power memories, has released SESAME uHD-BTF, the latest 6-Track architecture of their standard cell family, for cost sensitive designs at GSMC 0.18 mm uLL eFlash process.
The launched 6-Track standard cell library reduces silicon costs significantly in comparison with existing libraries. Benchmark results have indeed demonstrated that SESAME uHD-BTF achieves a 10% up to 20% area reduction after placement and routing, compared to alternative products.
SESAME uHD-BTF incorporates the latest architectural innovations from Dolphin Integration
Enriched with pulsed latches, i.e. "spinner cells", which replace the conventional D flip-flops and lead to 30% of area savings at cell level
Furthermore, with the spinner system, the same placement density as flip flop is ensured and the pulse generation is automated by a script for seamless integration within a standard design flow
The Ultra High Density cells leave metal 2 free to ensure more efficient place and route.
“SESAME uHD-BTF is the first 6-Track standard cell library released in a uLL process at 0.18 mm! This offering partakes in a complete Panoply including single port and dual port RAM and metal programmable ROM generators. Dolphin’s products will undoubtedly enhance customers’ competitiveness on their markets.” said Elsa Bernard-Moulin, Product Manager for Libraries.
Find out more information about this spinner cell system on the featured Tech Talk presented by Dolphin Integration as "Spinner System: optimized design and integration methodology based on pulsed latch for drastic area reduction in logic designs"
Just follow this link.
For more information, feel free to download the Presentation Sheet or to contact Dolphin’s Library Marketing Manager at email@example.com
About Dolphin Integration
Dolphin Integration contribute to "enabling mixed signal Systems-on-Chip". Their focus is to supply worldwide customers with fault-free, high-yield and reliable kits of CMOS Virtual Components of Silicon IP, based on innovative libraries of standard cells, flexible registers and low-power memories. They provide high-resolution converters for audio and measurement, regulators for efficient power supply networks, application optimized micro-controllers.
They put emphasis on resilience to noise and drastic reductions of power-consumption at system level, thanks to their own EDA solutions missing on the market for Application Hardware Modeling as well as early Power and Noise assessment. Such diverse experience in ASIC/SoC design and fabrication, plus privileged foundry portal even for small or medium volumes, makes them a genuine one-stop shop covering all customers’ needs for specific requests.