DCD announces new release of its D26C92 UART IP Core
September 4, 2013 -- The D2692 is a Dual UART Core software compatible with the SC26C92, SCC2692 and SCN2681. But on the contrary to it, DCD’s IP Core offers additional features and deeper FIFOs, like 8 character receiver, 8 character transmit FIFOs, watch dog timer for each receiver, mode register 0, extended baud rate, programmable receiver and transmitter interrupts.
The D2692 Dual Universal Asynchronous Receiver/Transmitter is a communication device that provides two full-duplex asynchronous receiver/transmitter channels in just one single package. DCD’s IP Core interfaces directly with microprocessors and may be used in a polled or interrupt driven system, furthermore provides modem and DMA interface.
The operating mode and data format of each channel can be programmed independently. - Additionally, each receiver and transmitter can select its operating speed – says Jacek Hanke, DCD’s CEO - as one of 27 fixed baud rates, a 16X clock derived from a programmable counter/timer, or an external 1X or 16X clock. The opportunity to program independently the operating speed of the receiver and transmitter, denotes the UART particularly attractive for dual-speed channel applications like eg clustered terminal systems.
Every receiver is being equipped with FIFO to minimize the potential of receiver over-run and to re-duce interrupt overhead in interrupt driven systems. Moreover, the D2692 UART IP Core ensures a flow control capability, to disable a remote DUART transmitter, when the receiver buffer is full. To make this design even more functional, there’ve been added multipurpose 7-bit input port and a multipurpose 8-bit output port. They can be used as general purpose I/O ports or can be assigned to specific functions (eg clock inputs or status/interrupt outputs) under program control.
Detailed information: http://dcd.pl/ipcore/785/d2692/
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