PLDA’s PCI Express 3.0 IP passes the PCI-SIG rigorous testing process, ensuring ease-of-integration and first-pass silicon success for its global customer base
SAN JOSE, Calif.-- September 10, 2013 --PLDA, the industry leader in PCI Express® and interface IP solutions today announced that its XpressRICH3™ PCI Express® (PCIe®) 3.0 solution, passed all Gold and Interoperability tests performed by the PCI-SIG® committee during its most recent workshop in August 2013. The testing was conducted using the PLDA XpressRICH3 IP, running in an add-in card configuration on PLDA’s Xpress V7LP board, based on a Xilinx Virtex®-7 FPGA
“Successful completion of the PCI-SIG compliance testing is a critical step in validating PLDA’s XpressRICH3 PCIe 3.0 IP solution. Combined with our extensive history of groundbreaking PCIe development and a track record of over 2,500 PCI Express designs in silicon, this certification provides our global customer base with a further indication of the quality and ease-of-integration they have come to expect from our IP products,” said Stephane Hauradou, CTO of PLDA.
PCI-SIG is the consortium that owns and manages PCI specifications as open industry standards. Its compliance workshops offer members the opportunity to test and validate their products before they enter the field. Testing is completed against PCI-SIG maintained systems, as well as other leading manufacturers of PCI products. The rigorous testing process includes interoperability testing on a range of PC hardware products, transaction layer and data link testing, physical layer testing and configuration testing.
“We’re pleased PLDA passed PCIe 3.0 compliance testing with its XpressRICH3 PCIe 3.0 IP product, which provides assistance to ASIC and FPGA designers by minimizing risk and lowering the cost of developing PCIe 3.0 designs,” said Al Yanes, PCI-SIG President and Chairman. “Its PCIe 3.0 compliant products facilitate protocol adherence and interoperability which contributes to the continued success of the PCI Express standard.”
“PLDA is a Certified Member of the Xilinx Alliance Program, collaborating closely with Xilinx to ensure their XpressRICH3 IP solution combines seamlessly with our leading FPGAs to deliver best-in-class solutions to our joint customer base,” stated Ketan Mehta, Senior Manager of IP Marketing at Xilinx, Inc. “PLDA’s PCIe Gen3x8 certification on Xilinx Virtex-7 FPGAs with GTH transceivers further validates the robustness of our combined solution.”
PLDA’s XpressRICH3 PCI Express 3.0 solution provides the following features and benefits:
- Flexible design, supporting Endpoint, Root-Port, Switch-ready and Dual-Role configurations
- Silicon-proven, with over 2500 designs in silicon, ensuring first pass silicon success
- Low latency, high-throughput user interface
- Supports a variety of speed from x1 at Gen1 to x16 at Gen3
- Virtualization-ready, with SR-IOV and ATS/ARI support
- Supports ExpressCard Specification
- Advanced debug and monitoring features
PLDA designs and sells intellectual property (IP) cores and prototyping tools for ASIC and FPGA that aim to accelerate time-to-market for embedded electronic designers. PLDA specializes in high-speed interface protocols and technologies such as PCIe, and Ethernet. PLDA provides IP cores with a complete set of tools, including FPGA production-ready and prototyping cards or System-on-Module components, drivers and APIs and testbenches. Their products benefit from a global support and sales organization able to sustain over 2,000 ASIC and FPGA customers worldwide. PLDA is a global company with offices in North America (San Jose, California) and in Europe (France, Italy). For more information visit www.plda.com.
PCI-SIG is the consortium that owns and manages PCI specifications as open industry standards. The organization defines industry standard I/O (input/output) specifications consistent with the needs of its members. Currently, PCI-SIG is comprised of nearly 800 industry-leading member companies. To join PCI-SIG, and for a list of the Board of Directors, visit www.pcisig.com.