Design & Reuse

OmniTek Introduces Enhanced OSVP Scalable Video Processor IP

IBC 2013, Amsterdam -- September 11, 2013 -- Video Processing specialist OmniTek is showing the latest version of its OSVP Scalable Video Processor IP block at its booth in IBC 2013 (Hall 6.A18).

The OSVP block is able to process up to eight individually-configured video channels, carrying out a user-defined sequence of video processing actions including chroma re-sampling, colour space conversion, de-interlacing, cropping, resizing and frame synchronisation.

The original version of the block (OSVP 1.0) works with video standards up to 2048 x2048 (interlaced or progressive), YUV or RGB in 4:2:2 or 4:4:4 format with either 8-, 10- or 12-bit colour depth per plane, producing progressive YUV 4:4:4 output. The IP block is targeted at Xilinx Kintex and Zynq devices and it features in Xilinx’s latest Real-Time Video Engine reference design (RTVE 2.1).

The new OSVP 2.0 block adds:

  • Support for 4K 60Hz video standards
  • User-definable 6-axis Colour Space Correction, offering RGB/YUV Gain & Lift, overall
  • Brightness level and Saturation level control, and Hue Rotation
  • Colour space conversion based on user-definable colour primaries
  • An enhanced Deinterlacer algorithm with best in class diagonal interpolation at low angles
  • Noise Reduction
  • Image Sharpening and Softening controls
  • Frame-based register update, facilitating smooth animated transitions
  • Extraction of interlaced video from progressive images

The new block is being demonstrated at the show in an enhanced version of the RTVE 2.1 reference design that incorporates the OSVP 2.0 block, implemented on OmniTek’s new OZ745 Zynq-based Video Development Platform.

The OSVP 2.0 design forms part of new OmniTek Scalable Video Processing Suite that also encompasses a dedicated pixel mux and a multi-streamed video combiner. All the elements of the suite offer AXI4-compatible interfaces and are delivered ready to be incorporated with other Xilinx compatible AXI4 components using Vivado IPI.

Also newly available targeted for Xilinx 6 Series and 7 Series FPGAs and SoCs is OmniTek’s Multichannel Streaming DMA Controller IP block which offers highly-efficient data streaming across either a Gen 1, Gen 2 or Gen 3 PCIe interface and is thus extremely well suited to the type of data streaming involved in video capture and playback.

OSVP 2.0 block diagram OSVP 2.0 Block Diagram

About OmniTek:

OmniTek was formed in 2001 and specialises in video test and measurement equipment and in FPGA IP, development boards and design services for video-related products. In 2008 OmniTek was awarded a Queen’s Award for Enterprise, for innovation. Additional information is available from www.omnitek.tv