VESA Refreshes DisplayID Standard to Support Higher Resolutions and Tiled Displays
Video Electronics Standards Association Delivers on Promise to ‘Future-Proof’ DisplayID Standard
NEWARK, CA -- September 24, 2013 – The Video Electronics Standards Association (VESA®) today announced the publication of VESA’s Display Identification Data Standard (DisplayID) version 1.3. Delivering on the Association’s promise to create standards that address emerging trends in display technology–including higher resolutions and pixels per inch (PPI)–the latest version of DisplayID now includes support for resolutions at 4K and beyond, tiled display topologies, stereo 3D formats and additional timing standards.
“Every day, increasing transmission rates, video resolutions, PPI and processing capabilities are making new display capabilities available to consumers. Our vision for DisplayID was to define a standard that can easily keep pace with a rapidly expanding universe of display options,” said Syed Athar Hussain, display domain architect for Advanced Micro Devices (AMD) and VESA vice-chairman. “With DisplayID, video sources—like computers, game consoles, cable boxes and video players—can easily discover the capabilities of the monitors they are connected to, enabling an automatic and seamless user experience between devices.”
The DisplayID standard was developed by the VESA members to define data structures that a video display uses to describe its physical and performance attributes. Encoded into a display EEPROM, DisplayID enables a video source to discover these display attributes, and to customize its video data stream output for the unique capabilities of an individual display.
DisplayID was developed as the evolutionary advancement for VESA’s widely adopted Extended Display Identification Data (EDID) standard. Designed specifically to be ‘future-proof,’ DisplayID employs flexible header and data structures that can be of varying length and number, in contrast to the fixed header and data structures used by EDID. The flexible, modular data structures defined by DisplayID enable new definitions to identify new display resolutions, refresh rates, audio standards and other formats and capabilities. One of the more exciting new capabilities, tiled displays, supports a single display that uses multiple video processors, with each video processor handling the image on one segment of the display. The latest 4K @60Hz monitors now entering the market offer four times the resolution of conventional high-definition TV. These new 4k monitors frequently employ tiled displays to enable a more optimized system level solution that satisfies the higher resolution trend.
“Display manufacturers are starting to develop advanced technologies, including 8K ultra-HD displays and displays that incorporate multiple video processors. These new display capabilities need to be identified and defined within the DisplayID standard for effective inter-operability and ease of use with other consumer and computer systems,” said Bill Lempesis, executive director at VESA. “Keeping standards at the forefront of technology enables manufacturers to deliver the latest capabilities in display technology to the consumer. VESA is proud to be an association that propels advancements within the display interface industry.”
For more information on VESA and the DisplayID standard, please visit http://www.vesa.org/. For more information about DisplayPort, please visit http://www.displayport.org
|
Related News
- VESA Publishes DisplayPort 2.0 Video Standard Enabling Support for Beyond-8K Resolutions, Higher Refresh Rates for 4K/HDR and Virtual Reality Applications
- VESA Updates Adaptive-Sync Display Standard with New Dual-Mode Support
- VESA Rolls Out DisplayID Version 2.0 Standard to Optimize Plug-and-Play Connectivity for Leading-Edge Displays
- Synopsys Integrates VESA Display Stream Compression into DesignWare MIPI DSI IP to Enable 4K Ultra HD and Higher Resolution Displays
- VESA Updates Display Stream Compression Standard to Support New Applications and Richer Display Content
Breaking News
- CXL Consortium Announces Compute Express Link 3.2 Specification Release
- Synopsys Posts Financial Results for Fourth Quarter and Fiscal Year 2024
- Alphawave IP - Announcement regarding leadership transition
- Global Semiconductor Sales Increase 22.1% Year-to-Year in October; Annual Sales Projected to Increase 19.0% in 2024
- Qualitas Semiconductor's MIPI D-PHY IP Powers Mass Production of Renesas AI MPU
Most Popular
- Now Gelsinger is gone, what is Intel's Plan B?
- SmartDV Licenses SDIO IP Family to Ranix for V2X Products
- Intel CEO's Departure Leaves Top U.S. Chipmaker Adrift
- IP players prominent in chiplet's 2024 diary
- Marvell Unveils Industry's First 3nm 1.6 Tbps PAM4 Interconnect Platform to Scale Accelerated Infrastructure
E-mail This Article | Printer-Friendly Page |