Scalable multi-core architecture delivers unrivalled performance and power efficiency for software-defined wireless infrastructure applications, targeting macrocells, small cells, cloud-RAN, Digital Front-End and backhaul
MOUNTAIN VIEW, Calif., Oct. 16, 2013 -- CEVA, Inc. (NASDAQ: CEVA), the leading licensor of DSP cores and platform solutions, today introduced the CEVA-XC4500 DSP - the world's first vector floating-point DSP specifically designed for advanced wireless infrastructure solutions. The CEVA-XC4500 incorporates a range of features that enable unrivalled performance for even the most demanding infrastructure applications, including a baseband-dedicated instruction set architecture (ISA), IEEE-compliant floating point support on full vector elements delivering up to 40 GFLOPs performance, comprehensive multi-core support, a fully cached architecture and hardware managed coherency. The CEVA-XC4500 also offers exceptional power efficiency, requiring as low as 100mW for LTE 2x2 Pico-Cell baseband processing. This latest generation DSP is available for licensing today and is already in design with a Tier-1 wireless infrastructure vendor.
Eran Briman, vice president of marketing at CEVA, commented: "The CEVA-XC4500 DSP is a game-changer for wireless infrastructure applications, combining powerful fixed- and floating-point vector processing together with the industry's most advanced multi-core feature set in a flexible, scalable platform. The DSP was designed to enable the creation of infrastructure SoCs that combine a software-based architecture together with optimized hardware accelerators, realizing maximum performance and power efficiency for any wireless infrastructure use case. We collaborated closely with ARM to ensure comprehensive support for their latest industry-standard interconnect and coherency protocols, enabling our mutual customers leverage the inherent advantages of designing ARM + CEVA-XC multi-core SoCs."
Linley Gwennap, principal analyst at The Linley Group, stated: "Continued advancements in processor technology for wireless infrastructure are essential as the wireless industry faces a continued explosion in bandwidth demand. Several important emerging technologies such as heterogeneous cellular networks (HetNet) and cloud RAN (C-RAN) require more powerful, higher performance processing solutions to deliver on their promise. The new CEVA-XC4500 DSP incorporates a range of powerful and advanced features that are well suited to meet the challenges of next-generation wireless infrastructure. This new product will bolster CEVA's position as the leading supplier of DSP technology. "The CEVA-XC4500 incorporates a range of features specifically designed to address the most advanced use cases required for wireless infrastructure applications. These include:
- High performance – up to 1.3GHz on 28nm
- Powerful vector DSP engine, optimized for baseband applications
- Supports Fixed Point and Floating Point (IEEE compliant) ISA on full vectors
- Enables software-defined architecture with a mix of optimized hardware engines for DSP offloading
- A wide range of tightly coupled acceleration blocks (TCE – Tightly Coupled Extensions) available
- Fully cacheable with advanced data cache including hardware cache coherency via ARM® AMBA® 4 ACE™
- Advanced System Interconnect using a mix of ARM AMBA 4 compliant buses and fast interconnect (FIC) buses
- Automated data traffic management offering fully parallel hardware acceleration management with no DSP intervention
- Dynamic scheduling enabling symmetric system design with runtime task allocation based on system load
The overall result is a highly powerful DSP architecture that enables customers to address any wireless infrastructure use case, including baseband: from small cells (Pico, Metro) to macro base stations and cloud RAN (C-RAN); Wi-Fi offloading; wireless backhaul, and; remote radio heads.
"We are pleased to collaborate with CEVA to meet the needs of businesses and consumers worldwide as the relentless growth of data consumption continues to challenge wireless networks," said Charlene Marini, vice president, Marketing, Embedded Segment, ARM. "The next generation of wireless infrastructure can be enabled by heterogeneous multi-core processors that combine ARM's high-performance, low-power processors, connected by high-performance cache-coherent interconnects with CEVA DSPs and hardware accelerators. CEVA's introduction of the CEVA-XC4500 is part of this exciting evolution."
The CEVA-XC4500 DSP architecture is supported by CEVA-Toolbox™, a complete software development environment, incorporating Vec-C™ compiler technology for advanced vector processors, enabling the entire architecture to be programmed in C. The Integrated simulator and profiler provide accurate modeling of the entire system including: caches, DMA controllers, interfaces, tightly coupled extensions, and more. In addition, CEVA-Toolbox includes a new set of LTE/LTE-Advanced eNodeB libraries introduced for the CEVA-XC4500 for the first time, which complements the existing comprehensive library suite for Wi-Fi, TD-SCDMA, WCDMA, HSPA+, and more.
CEVA will be presenting additional details on the CEVA-XC4500 DSP at the Linley Tech Processor Conference, today.
For more information on the CEVA-XC4500, visit www.ceva-dsp.com/CEVA-XC4500.
About CEVA, Inc.
CEVA is the world's leading licensor of silicon intellectual property (SIP) DSP cores and platform solutions for the mobile, portable and consumer electronics markets. CEVA's IP portfolio includes comprehensive technologies for cellular baseband (2G / 3G / 4G), multimedia (vision, imaging and HD audio), voice processing, Bluetooth, Serial Attached SCSI (SAS) and Serial ATA (SATA). In 2012, CEVA's IP was shipped in over 1.1 billion devices, powering smartphones from many of the world's leading OEMs, including HTC, Huawei, LG, Nokia, Motorola, Samsung, Sony, TCL and ZTE. Today, more than 40% of handsets shipped worldwide are powered by a CEVA DSP core. For more information, visit www.ceva-dsp.com. Follow CEVA on twitter at www.twitter.com/cevadsp.