Design & Reuse

Optimised intellectual property (IP) cores for use with Altera's Excalibur ARM-based devices are now available through the Altera Megafunction Partnership Program

IP for Excalibur

EETimes

IP for Excalibur
By David Larner,
October 18, 2001 (2:05 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011018S0056

Optimised intellectual property (IP) cores for use with Altera's Excalibur ARM-based devices are now available through the Altera Megafunction Partnership Program (AMPP). Eureka Technologies, Mentor Graphics, PLDApplications, inSilicon Corporation, and NewLogic Technologies worked with Altera engineers to optimize IP from their portfolios for use with Excalibur devices.

Excalibur provides single chip-integration of a high-performance 200MHz ARM922T processor core, programmable logic, on-chip memory, and key peripherals. This week Altera began shipping in volume production the first member of its ARM-based Excalibur embedded processor solutions.

Currently available cores include solutions for USB 1.1, USB 2.0, Bluetooth, PCI, UART and I2C.

Altera has also launched an Excalibur Partner Program to give access to a full range of third-party development tools for the Excalibur embedded processor solution and the Nios soft processor core.

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