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32-Bit RISC-V Embedded Processor and Subsystem, Maps ARM M-0 to M-4. Optimal PPA,
Cadence Design Systems and Berkeley Design Automation Settle Lawsuit
SAN JOSE, Calif. , 22 Jan 2014 -- Cadence Design Systems Inc. (NASDAQ: CDNS) and Berkeley Design Automation, Inc. (BDA) today announced that the companies have reached a settlement agreement in the case filed by Cadence against BDA last year.
As part of the settlement, BDA and Cadence signed a multi-year agreement to support interoperability between BDA’s Analog FastSPICE™ (AFS) Simulator and Cadence’s Virtuoso® Analog Design Environment (ADE) through Cadence’s OASIS interface, and BDA has agreed to pay Cadence an undisclosed amount.
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