EnglishOlympus adopts DMP's Hybrid Graphics IP core for OLYMPUS OM-D E-M1
Tokyo, Japan, January 30, 2014 -- Digital Media Professionals Inc. (DMP), a leading provider of 2D/3D graphics IP (Intellectual Property) cores, announced today that Olympus, a Japan based manufacturer of optics and reprography products , has selected DMP 2D/3D hybrid graphics IP core “SMAPH-H” for their OLYMPUS OM-D E-M1, the flagship model of a mirrorless system, integrating DSLR.
SMAPH-H is a hybrid graphics IP core optimized for high-performance, high-quality user interfaces and mobile applications, supporting OpenVG 1.1 and OpenGL ES 1.1/2.0 APIs. Vector and 3D graphics can share hardware components without any loss of graphics rendering performance. This IP core successfully reduces both die size and power consumption.
“We are really honored to be building on our close relationship with Olympus and we are excited that Olympus has selected SMAPH-H for its new flagship model of mirrorless interchangeable-lens cameras. The flexibility of the DMP graphics solution is well suited to support Olympus’s evolving needs as it continues to enhance its product lines with graphics functionality.” – Tatsuo Yamamoto, CEO, DMP.
About DMP
Digital Media Professionals Inc. (TOKYO: 3652) develops industry leading 2D and 3D graphics solutions for global consumer electronics, mobile, embedded and automotive markets. The company was founded in Tokyo, Japan in 2002 and is currently developing several graphics IP cores based on the Khronos™ Group open standards and DMP’s cutting edge 3D graphics IP “Maestro Technology”.
|
||||||
DMP Inc. Hot IP
Related News
- DMP 3D Graphics IP Core "PICA200 Lite" is adopted for OLYMPUS PEN Lite E-PL5.OLYMPUS PEN mini E-PM2
- Nintendo 2DS Adopts DMP's graphics IP core
- FujiFilm Adopts DMP's Graphics IP Core "SMAPH-H"
- DMP 3D Graphics IP Core "PICA200 Lite" is adopted for OLYMPUS Tough TG-1
- Mentor Catapult HLS Enables Stream TV's R&D Group SeeCubic to Develop Glasses-Free 3D Digital Display IP
Breaking News
- UltraSoC extends on-chip analytics architecture for the age of machine learning, artificial intelligence and parallel computing
- Cadence Selected as Primary EDA Tool Vendor by GLOBALFOUNDRIES
- Can MIPS Leapfrog RISC-V?
- Soitec Becomes Strategic Partner of Silicon Catalyst Start-up Incubator
- Next-generation Armv8.1-M architecture: Delivering enhanced machine learning and signal processing for the smallest embedded devices
Most Popular
- Can Arm Survive RISC-V Challenge?
- Next-generation Armv8.1-M architecture: Delivering enhanced machine learning and signal processing for the smallest embedded devices
- Can MIPS Leapfrog RISC-V?
- China's Semi Capex Forecast to be Larger than Europe and Japan Combined in 2018
- SmartDV Unveils SimXL Portfolio of Synthesizable Transactors for Hardware Emulation, FPGA Prototyping Platforms
|
E-mail This Article | 
|
|
Printer-Friendly Page |