- Industry's first single-channel Gigabit Ethernet controller integrating Gigabit Ethernet MAC with PL3 system interface
- Up to 1.6 Gbps packet rate transfers for industry standard or customized PL3 devices
SUNNYVALE, Calif. June 17, 2002– QuickLogic Corporation (Nasdaq: QUIK), the pioneer and leader in ESPs (embedded standard products), today announced the company's patent-pending, web-based WebESP . design environment can now deliver a high-speed Gigabit Ethernet to POS-PHY Level 3 (PL3) controller with packet rate transfers of up to 1.6 Gbps on the PL3 interface. QuickLogic's newest offering delivers a unique solution for system architects requiring single channel Gigabit Ethernet in applications such as access devices, routers, switches, test equipment, Packet over SONET/SDH (POS) and Ethernet-over-Sonet.
"As Gigabit Ethernet technology becomes widely available across the whole networking infrastructure, communications equipment manufacturers are looking for proven solutions that are optimized for their needs," said John Kim, QuickLogic's product marketing manager for embedded intellectual property. "Our single channel Gigabit Ethernet architecture delivers the required functionality with speed-to-market advantages."
Complete Feature Set
Built with standard interfaces, the new controller reduces design times by seamlessly connecting to industry standard Gigabit Ethernet PHY devices, network processor units or custom high layer processing devices. The product provides up to 1.6 Gbps packet rate transfers with a 104 MHz, 16-bit POS-PHY interface that exceeds the requirements for Gigabit Ethernet. It also implements full IEEE 802.3 compliant Media Access Controller (MAC) with preamble/SFD generation, as well as frame padding and CRC generation. The Gigabit Ethernet PHY device interface is enabled by a Gigabit Medium Independent Interface operating at 125 MHz. The controller has 2.5V and 3.3V compatible I/Os and is delivered in a 280-pin FPBGA package. Full details on the device are available at www.quicklogic.com.
Currently, WebESP's capabilities are focused on supporting a variety of communications-oriented applications, including multiplexers and bridges using Utopia I, Utopia II and Utopia III functions and POS-PHY L3. CSIX, PCI, and LVDS SERDES functions will be added next. These building blocks were developed in close collaboration with MorethanIP (www.morethanIP.com), a development partner in QuickLogic's ongoing programs created to deliver more complete application-oriented solutions. Through the WebESP system, architects select the specific communications market/applications target and then design and configure the specific options for each function according to their own requirements. Once the design is completed, the engineer can review their design and release it for implementation. QuickLogic then creates the customer-specified devices and ships them directly to designers for immediate system development. Production volume requirements are available with QuickLogic's standard three-week lead-time.
Pricing and Availability
The QuickLogic's new Gigabit Ethernet to POS-PHY Level 3 controller is available now through the WebESP web page, www.quicklogic.com/webesp. Editors: A block diagram of the new function is available at www.quicklogic.com/press.
QuickLogic ESP Advantages
QuickLogic's ESP families represent a system-level IC approach based on optimized, pre-characterized embedded functionality surrounded by user-customizable logic. The performance and size advantages provided by these embedded functions and QuickLogic's ViaLink . logic architecture make these families ideal for high-speed, low-power applications such as military communications systems, radar, target recognition and critical weapon systems. QuickLogic ESP families include QuickPCI, QuickRAM, QuickMIPS, QuickDSP, QuickFC and QuickSD.
QuickLogic Corporation (Nasdaq: QUIK) began developing the Embedded Standard Product (ESP) architecture, an innovation that delivers the guaranteed performance and lower cost of standard semiconductor products and the flexibility and time-to-market benefits of programmable logic, in 1998. QuickLogic's ViaLink metal-to-metal interconnect technology offers high performance and is the foundation of the company's ESP families as well as our core FPGA products. Founded in 1988 by the inventors of the PAL . , the company is located at 1277 Orleans Drive, Sunnyvale, CA 94089-1138. For more information please visit the QuickLogic web site at www.quicklogic.com
Safe Harbor Statement Under The Private Securities Litigation Reform Act of 1995
This news release contains forward-looking statements based on current expectations that involve risks and uncertainties including statements regarding availability, connectivity and performance of the QuickLogic Gigabit Ethernet to POS-PHY Level 3 controller. QuickLogic's actual results may differ from the results described in the forward-looking statements. Factors that could cause actual results to differ include, but are not limited to, general conditions in the semiconductor industry, development risks associated with and market acceptance of the QuickLogic Gigabit Ethernet to POS-PHY Level 3 controller and other QuickLogic products, as well as the impact of competitive products. These and other risk factors are detailed in QuickLogic's periodic reports and registration statements filed with the Securities and Exchange Commission.
The QuickLogic name and logo and ViaLink are registered trademarks and WebESP, QuickDSP, QuickRAM, QuickFC, QuickPCI QuickSD and QuickMIPS are trademarks of QuickLogic Corporation. All other brands or trademarks are the property of their respective holders and should be treated as such.