8kx8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18μm XH018 Modular Mixed Signal Process
MoSys Demonstrates 15.625G Bandwidth Engine SerDes Interoperability with Xilinx's Kintex UltraScale FPGA at OFC 2014
SAN FRANCISCO -- Mar. 11, 2014-- MoSys (NASDAQ: MOSY), a leader in semiconductor solutions that enable fast, intelligent data access for network and communications systems, is demonstrating its industry leading Bandwidth Engine® interface, at 15.625G, using Xilinx’s latest Kintex® UltraScale™ FPGA. The demonstration shows MoSys’ capability to support over 400Gbps effective throughput and can be seen at OFC 2014 in MoSys’ booth #3584.
“We designed the second generation Bandwidth Engine IC to solve critical bottlenecks and intercept key technology performance points," stated John Monson, VP of marketing for MoSys. “This demonstration showcases the true potential of our second generation Bandwidth Engine IC with the Kintex® UltraScale FPGA running at its native capability, enabling 200Gbps datapath applications in a single chip."
“Xilinx is pleased to be demonstrating our latest Kintex® UltraScale FPGA with MoSys at OFC. The UltraScale architecture applies leading-edge ASIC techniques in a fully programmable architecture to enable multi-hundred gigabit-per-second levels of system performance with smart processing at full line rates. We are able to fully support MoSys’ Bandwidth Engine interface with the mid-speed GTH transceivers, and still have ample IO capability for datapath interconnect," said Dave Myron, senior director of FPGA product management and marketing at Xilinx.
MoSys’ Bandwidth Engine Family of ICs is a computational and memory solution with serial interfaces for 100G+ networking equipment, offering the highest bandwidth capability of any single chip networking memory device. Compared to traditional networking memories, such as QDR SRAM or RLDRAM, the Bandwidth Engine IC family delivers density, performance, power and economic advantage, and is engineered and built for high-reliability, extended lifetime carrier-class and enterprise applications.
The OFC technical conference takes place March 9-13, 2014 with exhibitions running March 11-13, 2014 at the Moscone Center in San Francisco.
About MoSys, Inc.
MoSys, Inc. (NASDAQ: MOSY) is a fabless semiconductor company enabling leading equipment manufacturers in the networking and communications systems markets to address the continual increase in Internet users, data and services. The company's solutions deliver data path connectivity, speed and intelligence while eliminating data access bottlenecks on line cards and systems scaling from 100G to multi-terabits per second. Engineered and built for high-reliability carrier and enterprise applications, MoSys' Bandwidth Engine® and LineSpeed™ IC product families are based on the company's patented high-performance, high-density intelligent access and high-speed serial interface technology, and utilize the company's highly efficient GigaChip™ Interface. MoSys is headquartered in Santa Clara, California. More information is available at www.mosys.com.
|
Related News
- MoSys Demonstrates Bandwidth Engine IC Interoperability with LSI SerDes
- MoSys Demonstrates Bandwidth Engine IC Interoperability with Avago Technologies SerDes
- MoSys Demonstrates Interoperability of its Bandwidth Engine(R) IC at DesignCon 2012
- Xilinx Announces the World's Largest FPGA Featuring 9 Million System Logic Cells
- Enyx Premieres 25G TCP and UDP Offload Engines with Xilinx Virtex UltraScale+ 16nm FPGA on BittWare's XUPP3R PCIe Board
Breaking News
- Creonic Introduces Doppler Channel IP Core
- Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
- RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?
- YorChip and ChipCraft announce low-cost, high-speed 200Ms/s ADC Chiplet
- SIA Statement on Biden Administration Action Imposing New Export Controls on AI Chips
Most Popular
- Imagination pulls out of RISC-V CPUs
- Eighteen New Semiconductor Fabs to Start Construction in 2025, SEMI Reports
- BrainChip Brings Neuromorphic Capabilities to M.2 Form Factor
- RISC-V in AI and HPC Part 1: Per Aspera Ad Astra?
- Synopsys Responds to the European Commission Approving its Proposed Acquisition of Ansys in Phase 1
E-mail This Article | Printer-Friendly Page |