Design & Reuse

Common Platform in Preparation for SOI, FinFETs at 10nm

Peter Clarke, Electronics360
08 April 2014

A team of engineers from IBM Microelectronics, Globalfoundries, Samsung, STMicroelectronics and UMC are due to present a 10nm logic platform that supports FinFETs on both bulk CMOS and on silicon-on-insulator wafers.

The presentation of paper 2.2 is set to be one of the highlights of the Symposium on VLSI Technology due to take place June 9 to 12 at Honolulu, Hawaii. It represents a coming together of the interests of the FinFET and fully-depleted silicon-on-insulator (FDSOI) camps, but not yet a complete merging.