Offers DDR Designers Unprecedented Insight Into DDR Performance and Margins
SAN JOSE, CALIF. –– May 21, 2014 –– Uniquify today announced the release of the UniquiPHY™ DDR System Analyzer (DSA), a comprehensive software package that provides designers with a suite of automated DDR analysis, visualization and debug tools.
A leading high-performance semiconductor intellectual property (IP) and system-on-chip (SoC) integration and manufacturing services supplier, Uniquify is noted for offering the industry’s fastest DDR4 performance in silicon of 2800 megabits per second (Mbps).
DSA complements its adaptive PHY technologies, dynamic self-calibrating logic (DSCL) and dynamic adaptive bit calibration (DABC), by giving the DDR design team a powerful, automated analysis and debug tool that interacts directly with the UniquiPHY DDR PHY. DSA allows the user to directly control PHY behavior and run numerous analyses, including trim and margin tests, DLL step-size tests, and general initialization and read/write tests. The streamlined analyses provided by DSA give the DDR design team detailed insight into the DDR system performance and margins and also provide detailed information that speeds DDR system debug.
In addition to specific DDR analyses, DSA provides other useful system-level functions, such as verifying board connectivity and quality such as deskew. DSA can also be used to help evaluate the performance and quality of different DDR SDRAM components from either different vendors and/or different speed grades.
“The UniquiPHY DDR System Analyzer delivers detailed analyses that give design teams critical data on how their DDR system is performing,” said Venkat Iyer, chief technical officer of Uniquify. “Another key benefit is that by automating the process of data collection, analysis and debug, DSA can literally reduce weeks of what was typically a completely manual effort into just hours. We are very pleased to make this powerful package available to design teams using our DDR IP.”
Availability and Pricing
The UniquiPHY DDR System Analyzer is available now as an accessory to the UniquiPHY family of DDR PHY IP. Pricing is available on request.
See UniquiPHY DDR System Analyzer in Action at DAC
Uniquify will demonstrate the UniquiPHY DDR System Analyzer at the 51st Design Automation Conference (DAC) in Booth #1013 Monday, June 2, through Wednesday, June 4, from 9 a.m. until 6 p.m. at the Moscone Center in San Francisco.
For information about DAC website, visit: www.dac.com.
Uniquify is a rapidly growing system-on-chip (SoC) design, integration and manufacturing services supplier, and innovative developer of high-performance semiconductor intellectual property (IP) offering the world’s fastest DDR memory IP. Its “ideas2silicon” services range from specification development and front-end design through physical design and delivery of packaged, tested chips. It offers 65-, 40- and 28-nanometer SoC design expertise, integration and manufacturing services to leading semiconductor and system companies worldwide. Uniquify’s adaptive DDR subsystem IP offers the highest DDR performance with the lowest power, smallest area and the best system reliability –– a result of its patented self-calibrating technology. Uniquify’s headquarters and primary design center is in San Jose, Calif., with additional design and technical sales and support teams in China, India, Japan, Korea and Vietnam. For more information, visit: www.uniquify.com.