TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries, multiple metalstacks
Arasan Chip Systems Presents MIPI D-PHY, M-PHY and USB 2.0 IP at the 51st DAC
Arasan’s MIPI D-PHY, M-PHY and USB 2.0 Mobile IP Solutions will be on display in booth #716 and the Hot IP Track at DAC June 2-4, 2014 in Moscone Center, San Francisco, CA.
San Jose, CA. -- May 27, 2014 -- Arasan is a leader in providing silicon proven MIPI IP cores to system companies for mobile connectivity and storage. MIPI D-PHY and CSI for camera interface, and MIPI D-PHY and DSI for display interface, are mobile industry standards. MIPI M-PHY for Universal Flash Storage (UFS) offers a new level of performance for mobile storage.
Arasan’s hardware validation platforms (HVPs) are used for IP validation and compliance testing. At DAC in Booth #716, we are showcasing hardware solutions for SoC / ASIC prototyping. We are demonstrating daughter cards that provide 4 lanes of MIPI D-PHY at 1.5Gbps, and 2 lanes of MIPI M-PHY at 5.8Gbps. We will be presenting a paper on MIPI modules for SoC prototyping at the Hot IP Track, June 2 at 1:30PM.
USB for Mobile
USB 2.0 is the dominant peripheral interface for media transfer, data synchronization, and charging. Arasan’s Total USB IP solution includes the USB 2.0 Host with an EHCI controller and integrated USB 2.0 Hub, enabling support for all USB 2.0 speeds; USB 2.0 Device and OTG controllers, and a USB 2.0 PHY available in a wide range of foundries and process nodes. “Arasan’s USB 2.0 Host Controller provides an optional AXI/AHB interface, which makes it attractive for ARM-based embedded platforms,” says Ron Mabry, Arasan World Wide VP of Sales. Arasan’s EHCI with integrated hub simplifies embedded design by eliminating a software driver.
Availability
MIPI CSI-2 and MIPI DSI total IP solutions include Arasan’s MIPI D-PHY Version 1.1, available in process nodes ranging from 180nm to 28nm; RTL for host side and device controllers and D-PHY modules for ASIC prototyping.
USB 2.0 Total IP solution includes host, hub, device and OTG controllers with associated software, the HSIC chip to chip PHY, and the USB 2.0 mixed signal PHY available in process nodes ranging from 180nm to 28nm
About Arasan
Arasan Chip Systems is a leading provider of Total IP Solutions for mobile storage and connectivity applications. Arasan’s high-quality, silicon-proven, Total IP Solutions include digital IP cores, analog PHY interfaces, verification IP, hardware verification kits, protocol analyzers, software stacks and drivers, and optional customization services for MIPI, USB, UFS, SD, SDIO, MMC/eMMC, UFS, and many other popular standards. Arasan’s Total IP products serve system architects and chip design teams in mobile, gaming and desktop computing systems that require silicon-proven, validated IP, delivered with the ability to integrate and verify both digital, analog and software components in the shortest possible time with the lowest risk.
Unlike many other IP providers, Arasan’s Total IP Solution encompasses all aspects of IP development and integration, including analog and digital cores, hardware development kits, protocol analyzers, validation IP and software stacks and drivers and optional architecture consulting and customization services. Based in San Jose, CA, USA, Arasan Chip Systems has a 17 year track record of IP and IP standards development leadership.
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Arasan Chip Systems Hot IP
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