MOSCAD Design & Automation Releases Ultra low-power Voltage regulator cell in 55nm

June 25, 2014 -- MOSCAD Design & Automation has released a new version of its ultra-low power voltage regulator cell in UMC 55nm Low Power CMOS process.

Total power consumption, to which leakage is an increasing contributor, is increasing as technology scaling progresses. This poses a challenge in reducing power consumption of cells designed to be used in 65/55 nm and below.

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SMIC 0.25um 5v~2.5v Voltage Regulator Capless LDO voltage regulator (130 nm, 500 mA, excellent load transient)

The VR3_12_1 provides a 1.2V output with an input ranging from 1.6 to 3.6 V. It offers ultra-low quiescent current of less than 2µA, including the built-in Bandgap reference circuit. This makes the cell ideally suited for wireless portable devices and any other battery operated devices.

The VR3_12_1 is a member of MOSCAD’s family of High-Performance analog and mixed-signal IP which can be easily integrated into Analog- or Mixed-Signal SoC’s.

Specifications and product brief

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