Mentor Graphics Delivers Veloce Emulation Solutions for the Verification of High-Performance Memory Products

WILSONVILLE, Ore. -- July 9, 2014 -- Mentor Graphics Corp. , a leader in advanced system verification solutions, today announced emulation solutions to accelerate the verification of high-performance memory products that use the latest-generation standards: Hybrid Memory Cube (HMC), LPDDR4, and eMMC 5.0. Using these emulation solutions with the Veloce® emulation platform, designers can test new devices integrated on their System-on-Chip (SoC) designs, and develop and stress-test their software and hardware with billions of verification cycles before silicon is available.

SoC designers require higher memory bandwidth and performance in response to the challenges created with products such as mobile multimedia devices and new networking infrastructure. To address this requirement, Mentor has created models for emerging memory standards that can be accelerated on the Veloce 2 emulator. The combined solution delivers functionality and performance to meet critical system-level verification needs.

HMC is a 3D-DRAM architecture that can deliver memory bandwidths in excess of 100Gbits/second, or 15 times that of DDR3 memories, while consuming 70 percent less energy/bit than DDR3. HMC is increasingly used to meet the 100Gbit and higher networking application requirements, and is also targeted for higher GPU and CPU bandwidth needs.

The LPDDR4 and eMMC 5.0 memories are complementary technologies used in ultra-mobile products, such as tablets, superphones, and ultrabooks where LPDDR4 is used for DRAM, and eMMC 5.0 is used for mass storage. High bandwidth and performance, low power and cost, and a small form factor are key characteristics that make these memory standards attractive for today's SoC designers.

All three memory models can now be used by verification engineers, in conjunction with the rest of their SoC design running in the Veloce emulator, in a plug-and-play way that eases their adoption in an accelerated verification environment. In addition, each memory device model is compatible with the Questa® functional verification platform to allow an easy transition from simulation to emulation.

"Our ability to provide industry-leading solutions for the verification of SoC designs containing next-generation memory devices is critical to the success of our customers developing high-performance products," said Eric Selosse, vice president and general manager, Mentor Emulation Division. "In delivering these new memory device solutions for emulation, Mentor has again demonstrated our leadership as the premier supplier of hardware-assisted products for SoC verification, and our commitment to providing customers with the best-in-class emulation solutions for the latest-generation standards."

The new memory device models can be used for traditional in-circuit emulation (ICE), virtual lab emulation, and high-performance, transaction-based acceleration. When combined with the Veloce2 emulator, these memory solutions deliver high-performance and easy-to-use IP and system-level verification for verifying SoCs containing HMC, LPDDR4, or eMMC 5.0 devices, without compromising delivery schedules.

All three solutions are available for deployment at customer sites effective immediately. For product information on the Mentor memory model solutions, contact your Mentor sales representative, call 800-547-3000, or visit the website at www.mentor.com/med .

About Mentor Graphics

Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year in excess of $1.15 billion. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/ .