IP And FinFETs At Advanced Nodes - Part 2

Ed Sperling, Semiconductor Engineering
July 21, 2014

Experts at the table, part 2: FinFETs become more complex at each new node; stacked die IP challenges; including the package in the simulation; local versus global design concerns.

Semiconductor Engineering sat down to discuss IP and finFETs at advanced nodes with Warren Savage, president and CEO of IPextreme; Aveek Sarkar, vice president of engineering and product support at Ansys-Apache; Randy Smith, vice president of marketing at Sonics, and Bernard Murphy, CTO of Atrenta;. What follows are excerpts of that conversation.