Energy-efficient and programmable heterogeneous many-core platform with self-adaptive capabilities
Neuchâtel -- August 12, 2014 - The FlexTiles project was launched in 2011 by a consortium of industries, universities and RTOs coordinated by Thales. They have joined forces to develop a programmable heterogeneous many-core platform which can be reconfigured on the fly to meet advanced processing needs such as surveillance drones or driverless cars. With the project nearing its end (October 2014), a workshop is organized on September 1 in Munich to present results and offer a hands-on experience.
A major challenge in computing is to leverage multi-core technology to develop energy-efficient high performance systems. This is critical for embedded systems with a very limited energy budget as well as for supercomputers in terms of sustainability. The efficient programming of multi-core architectures remains an unresolved issue and will be an ever greater challenge as we move towards many-core solutions with more than a thousand processor cores predicted by 2020. The FlexTiles project defines and develops an energy-efficient yet programmable heterogeneous many-core platform with self-adaptive capabilities.
The many-core platform is associated with an innovative virtualization layer and a dedicated tool-flow to improve programming efficiency, reduce the impact on time to market and reduce the development cost by 20 to 50%. FlexTiles raises the accessibility of the many-core technology to industry - from SMEs to large companies - thanks to its programming efficiency and its ability to adapt to the targeted application using embedded reconfigurable technologies.
FlexTiles is a 3D stacked chip with a many-core layer and a reconfigurable layer. This heterogeneity brings a high level of flexibility in adapting the architecture to the targeted application domain for performance and energy efficiency.
A virtualization layer on top of a kernel hides the heterogeneity and the complexity of the many-core platform from its programmer and fine-tunes the mapping of an application at runtime. The virtualization layer provides self-adaptation capabilities by dynamic relocation of application tasks to software on the many-core layer (made up of general purpose and DSP processors) or to hardware on the reconfigurable layer. This self-adaptation is used to optimize load balancing, power consumption, hot spots and resilience to faulty modules.
A FlexTiles workshop will be held on September 1 within the International Conference on Field Programmable Logic and Applications, FPL2014, in Munich, Germany. Registration for the workshop is separate from the conference. More information about the workshop.
The FlexTiles FP7, www.flextiles.eu, project is co-funded by the European Commission under the Seventh Framework Program.
|
CSEM Hot IP
Related News
- ARM Announces New High-Performance System IP to Address Demand for Energy-Efficient "Many-core" Solutions for the Enterprise Market
- ShortLink AB and Dolphin Design partner to create a highly energy-efficient Sub-GHz ASIC design platform
- IMEC unveils tools to speed design of energy-efficient multi-processor SoC platforms
- Frontgrade Gaisler Launches New GRAIN Line and Wins SNSA Contract to Commercialize First Energy-Efficient Neuromorphic AI for Space Applications
- BBright Expands Ultra HD Capabilities with intoPIX JPEG XS Technology in its V2.2 Decoder Platform
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |